All of lore.kernel.org
 help / color / mirror / Atom feed
From: James Hogan <james.hogan@imgtec.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Ralf Baechle <ralf@linux-mips.org>
Cc: "James Hogan" <james.hogan@imgtec.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	linux-mips@linux-mips.org, kvm@vger.kernel.org
Subject: [PATCH 10/17] MIPS: KVM: Allow ULRI to restrict UserLocal register
Date: Wed, 15 Jun 2016 19:29:54 +0100	[thread overview]
Message-ID: <1466015401-24433-11-git-send-email-james.hogan@imgtec.com> (raw)
In-Reply-To: <1466015401-24433-1-git-send-email-james.hogan@imgtec.com>

The ULRI bit in Config3 specifies whether the UserLocal register is
implemented, but it is assumed to always be set. Now that the Config
registers can be modified by userland, allow Config3.ULRI to be cleared
and check ULRI before allowing the corresponding bit to be set in
HWREna.

In fact any HWREna bits corresponding to unimplemented RDHWR registers
should read as zero and be ignored on write, so we actually prevent
other unimplemented bits being set too.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
---
 arch/mips/kvm/emulate.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c
index 892f36f56d32..84f435bf74bd 100644
--- a/arch/mips/kvm/emulate.c
+++ b/arch/mips/kvm/emulate.c
@@ -921,8 +921,8 @@ unsigned int kvm_mips_config1_wrmask(struct kvm_vcpu *vcpu)
  */
 unsigned int kvm_mips_config3_wrmask(struct kvm_vcpu *vcpu)
 {
-	/* Config4 is optional */
-	unsigned int mask = MIPS_CONF_M;
+	/* Config4 and ULRI are optional */
+	unsigned int mask = MIPS_CONF_M | MIPS_CONF3_ULRI;
 
 	/* Permit MSA to be present if MSA is supported */
 	if (kvm_mips_guest_can_have_msa(&vcpu->arch))
@@ -1229,6 +1229,16 @@ enum emulation_result kvm_mips_emulate_CP0(union mips_instruction inst,
 					else
 						kvm_mips_count_enable_cause(vcpu);
 				}
+			} else if ((rd == MIPS_CP0_HWRENA) && (sel == 0)) {
+				u32 mask = MIPS_HWRENA_CPUNUM |
+					   MIPS_HWRENA_SYNCISTEP |
+					   MIPS_HWRENA_CC |
+					   MIPS_HWRENA_CCRES;
+
+				if (kvm_read_c0_guest_config3(cop0) &
+				    MIPS_CONF3_ULRI)
+					mask |= MIPS_HWRENA_ULR;
+				cop0->reg[rd][sel] = vcpu->arch.gprs[rt] & mask;
 			} else {
 				cop0->reg[rd][sel] = vcpu->arch.gprs[rt];
 #ifdef CONFIG_KVM_MIPS_DYN_TRANS
-- 
2.4.10

  parent reply	other threads:[~2016-06-15 18:33 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-15 18:29 [PATCH 00/17] MIPS: KVM: Misc KVM T&E improvements James Hogan
2016-06-15 18:29 ` [PATCH 01/17] MIPS: KVM: Fix translation of MFC0 ErrCtl James Hogan
2016-06-15 18:29 ` [PATCH 02/17] MIPS: KVM: Factor writing of translated guest instructions James Hogan
2016-06-15 18:29 ` [PATCH 03/17] MIPS: KVM: Convert emulation to use asm/inst.h James Hogan
2016-06-15 19:04   ` Ralf Baechle
2016-06-15 18:29 ` [PATCH 04/17] MIPS: KVM: Pass all unknown registers to callbacks James Hogan
2016-06-15 18:29 ` [PATCH 05/17] MIPS: KVM: Make KVM_GET_REG_LIST dynamic James Hogan
2016-06-15 18:29 ` [PATCH 06/17] MIPS: KVM: Use raw_cpu_has_fpu in kvm_mips_guest_can_have_fpu() James Hogan
2016-06-15 18:29 ` [PATCH 07/17] MIPS: KVM: List FPU/MSA registers James Hogan
2016-06-15 18:29 ` [PATCH 08/17] MIPS: Clean up RDHWR handling James Hogan
2016-06-15 19:05   ` Ralf Baechle
2016-06-15 18:29 ` [PATCH 09/17] MIPS: KVM: Don't hardcode restored HWREna James Hogan
2016-06-15 21:50   ` Ralf Baechle
2016-06-15 18:29 ` James Hogan [this message]
2016-06-15 18:29 ` [PATCH 11/17] MIPS: KVM: Emulate RDHWR CPUNum register James Hogan
2016-06-15 18:29 ` [PATCH 12/17] MIPS: KVM: Add KScratch registers James Hogan
2016-06-15 18:29 ` [PATCH 13/17] MIPS: KVM: Move commpage so 0x0 is unmapped James Hogan
2016-06-15 18:29 ` [PATCH 14/17] MIPS: KVM: Use host CCA for TLB mappings James Hogan
2016-06-15 18:29 ` [PATCH 15/17] MIPS: Add define for Config.VI (virtual icache) bit James Hogan
2016-06-15 18:29   ` James Hogan
2016-06-15 19:07   ` Ralf Baechle
2016-06-15 18:30 ` [PATCH 16/17] MIPS: KVM: Report more accurate CP0_Config fields to guest James Hogan
2016-06-15 18:30 ` [PATCH 17/17] MIPS: KVM: Use mipsregs.h defs for config registers James Hogan

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1466015401-24433-11-git-send-email-james.hogan@imgtec.com \
    --to=james.hogan@imgtec.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-mips@linux-mips.org \
    --cc=pbonzini@redhat.com \
    --cc=ralf@linux-mips.org \
    --cc=rkrcmar@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.