From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39122) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bEsNU-00031P-QE for qemu-devel@nongnu.org; Mon, 20 Jun 2016 02:08:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bEsNT-0001ee-Fb for qemu-devel@nongnu.org; Mon, 20 Jun 2016 02:08:08 -0400 Received: from [59.151.112.132] (port=18433 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bEsNS-0001dt-Od for qemu-devel@nongnu.org; Mon, 20 Jun 2016 02:08:07 -0400 From: Cao jin Date: Mon, 20 Jun 2016 14:13:38 +0800 Message-ID: <1466403224-16604-8-git-send-email-caoj.fnst@cn.fujitsu.com> In-Reply-To: <1466403224-16604-1-git-send-email-caoj.fnst@cn.fujitsu.com> References: <1466403224-16604-1-git-send-email-caoj.fnst@cn.fujitsu.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH v9 07/13] pci bridge dev: change msi property type List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Markus Armbruster , Marcel Apfelbaum >>From bit to enum OnOffAuto. cc: Michael S. Tsirkin cc: Markus Armbruster cc: Marcel Apfelbaum Reviewed-by: Markus Armbruster Signed-off-by: Cao jin --- hw/pci-bridge/pci_bridge_dev.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index 41ca47b..0fbecc4 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -42,9 +42,10 @@ struct PCIBridgeDev { MemoryRegion bar; uint8_t chassis_nr; -#define PCI_BRIDGE_DEV_F_MSI_REQ 0 -#define PCI_BRIDGE_DEV_F_SHPC_REQ 1 +#define PCI_BRIDGE_DEV_F_SHPC_REQ 0 uint32_t flags; + + OnOffAuto msi; }; typedef struct PCIBridgeDev PCIBridgeDev; @@ -66,7 +67,7 @@ static int pci_bridge_dev_initfn(PCIDevice *dev) } } else { /* MSI is not applicable without SHPC */ - bridge_dev->flags &= ~(1 << PCI_BRIDGE_DEV_F_MSI_REQ); + bridge_dev->msi = ON_OFF_AUTO_OFF; } err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0); @@ -74,7 +75,7 @@ static int pci_bridge_dev_initfn(PCIDevice *dev) goto slotid_error; } - if ((bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_MSI_REQ)) && + if (bridge_dev->msi != ON_OFF_AUTO_OFF && msi_nonbroken) { err = msi_init(dev, 0, 1, true, true); if (err < 0) { @@ -147,8 +148,8 @@ static Property pci_bridge_dev_properties[] = { /* Note: 0 is not a legal chassis number. */ DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr, 0), - DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, flags, - PCI_BRIDGE_DEV_F_MSI_REQ, true), + DEFINE_PROP_ON_OFF_AUTO(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, msi, + ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, PCI_BRIDGE_DEV_F_SHPC_REQ, true), DEFINE_PROP_END_OF_LIST(), -- 2.1.0