From: Kees Cook <keescook@chromium.org> To: Ingo Molnar <mingo@kernel.org> Cc: Kees Cook <keescook@chromium.org>, Thomas Garnier <thgarnie@google.com>, Andy Lutomirski <luto@kernel.org>, x86@kernel.org, Borislav Petkov <bp@suse.de>, Baoquan He <bhe@redhat.com>, Yinghai Lu <yinghai@kernel.org>, Juergen Gross <jgross@suse.com>, Matt Fleming <matt@codeblueprint.co.uk>, Toshi Kani <toshi.kani@hpe.com>, Andrew Morton <akpm@linux-foundation.org>, Dan Williams <dan.j.williams@intel.com>, "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>, Dave Hansen <dave.hansen@linux.intel.com>, Xiao Guangrong <guangrong.xiao@linux.intel.com>, Martin Schwidefsky <schwidefsky@de.ibm.com>, "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>, Alexander Kuleshov <kuleshovmail@gmail.com>, Alexander Popov <alpopov@ptsecurity.com>, Dave Young <dyoung@redhat.com>, Joerg Roedel <jroedel@suse.de>, Lv Zheng <lv.zheng@intel.com>, Mark Salter <msalter@redhat.com>, Dmitry Vyukov <dvyukov@google.com>, Stephen Smalley <sds@tycho.nsa.gov>, Boris Ostrovsky <boris.ostrovsky@oracle.com>, Christian Borntraeger <borntraeger@de.ibm.com>, Jan Beulich <JBeulich@suse.com>, linux-kernel@vger.kernel.org, Jonathan Corbet <corbet@lwn.net>, linux-doc@vger.kernel.org, kernel-hardening@lists.openwall.com Subject: [PATCH v7 4/9] x86/mm: Separate variable for trampoline PGD (x86_64) Date: Tue, 21 Jun 2016 17:47:01 -0700 [thread overview] Message-ID: <1466556426-32664-5-git-send-email-keescook@chromium.org> (raw) In-Reply-To: <1466556426-32664-1-git-send-email-keescook@chromium.org> From: Thomas Garnier <thgarnie@google.com> Use a separate global variable to define the trampoline PGD used to start other processors. This change will allow KALSR memory randomization to change the trampoline PGD to be correctly aligned with physical memory. Signed-off-by: Thomas Garnier <thgarnie@google.com> Signed-off-by: Kees Cook <keescook@chromium.org> --- arch/x86/include/asm/pgtable.h | 12 ++++++++++++ arch/x86/mm/init.c | 3 +++ arch/x86/realmode/init.c | 5 ++++- 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index 1a27396b6ea0..d455bef39e9c 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h @@ -729,6 +729,18 @@ extern int direct_gbpages; void init_mem_mapping(void); void early_alloc_pgt_buf(void); +#ifdef CONFIG_X86_64 +/* Realmode trampoline initialization. */ +extern pgd_t trampoline_pgd_entry; +static inline void __meminit init_trampoline(void) +{ + /* Default trampoline pgd value */ + trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)]; +} +#else +static inline void init_trampoline(void) { } +#endif + /* local pte updates need not use xchg for locking */ static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) { diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index 372aad2b3291..4252acdfcbbd 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -590,6 +590,9 @@ void __init init_mem_mapping(void) /* the ISA range is always mapped regardless of memory holes */ init_memory_mapping(0, ISA_END_ADDRESS); + /* Init the trampoline, possibly with KASLR memory offset */ + init_trampoline(); + /* * If the allocation is in bottom-up direction, we setup direct mapping * in bottom-up, otherwise we setup direct mapping in top-down. diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index 0b7a63d98440..705e3fffb4a1 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -8,6 +8,9 @@ struct real_mode_header *real_mode_header; u32 *trampoline_cr4_features; +/* Hold the pgd entry used on booting additional CPUs */ +pgd_t trampoline_pgd_entry; + void __init reserve_real_mode(void) { phys_addr_t mem; @@ -84,7 +87,7 @@ void __init setup_real_mode(void) *trampoline_cr4_features = __read_cr4(); trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd); - trampoline_pgd[0] = init_level4_pgt[pgd_index(__PAGE_OFFSET)].pgd; + trampoline_pgd[0] = trampoline_pgd_entry.pgd; trampoline_pgd[511] = init_level4_pgt[511].pgd; #endif } -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Kees Cook <keescook@chromium.org> To: Ingo Molnar <mingo@kernel.org> Cc: Kees Cook <keescook@chromium.org>, Thomas Garnier <thgarnie@google.com>, Andy Lutomirski <luto@kernel.org>, x86@kernel.org, Borislav Petkov <bp@suse.de>, Baoquan He <bhe@redhat.com>, Yinghai Lu <yinghai@kernel.org>, Juergen Gross <jgross@suse.com>, Matt Fleming <matt@codeblueprint.co.uk>, Toshi Kani <toshi.kani@hpe.com>, Andrew Morton <akpm@linux-foundation.org>, Dan Williams <dan.j.williams@intel.com>, "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>, Dave Hansen <dave.hansen@linux.intel.com>, Xiao Guangrong <guangrong.xiao@linux.intel.com>, Martin Schwidefsky <schwidefsky@de.ibm.com>, "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>, Alexander Kuleshov <kuleshovmail@gmail.com>, Alexander Popov <alpopov@ptsecurity.com>, Dave Young <dyoung@redhat.com>, Joerg Roedel <jroedel@suse.de>, Lv Zheng <lv.zheng@intel.com>, Mark Salter <msalter@redhat.com>, Dmitry Vyukov <dvyukov@google.com>, Stephen Smalley <sds@tycho.nsa.gov>, Boris Ostrovsky <boris.ostrovsky@oracle.com>, Christian Borntraeger <borntraeger@de.ibm.com>, Jan Beulich <JBeulich@suse.com>, linux-kernel@vger.kernel.org, Jonathan Corbet <corbet@lwn.net>, linux-doc@vger.kernel.org, kernel-hardening@lists.openwall.com Subject: [kernel-hardening] [PATCH v7 4/9] x86/mm: Separate variable for trampoline PGD (x86_64) Date: Tue, 21 Jun 2016 17:47:01 -0700 [thread overview] Message-ID: <1466556426-32664-5-git-send-email-keescook@chromium.org> (raw) In-Reply-To: <1466556426-32664-1-git-send-email-keescook@chromium.org> From: Thomas Garnier <thgarnie@google.com> Use a separate global variable to define the trampoline PGD used to start other processors. This change will allow KALSR memory randomization to change the trampoline PGD to be correctly aligned with physical memory. Signed-off-by: Thomas Garnier <thgarnie@google.com> Signed-off-by: Kees Cook <keescook@chromium.org> --- arch/x86/include/asm/pgtable.h | 12 ++++++++++++ arch/x86/mm/init.c | 3 +++ arch/x86/realmode/init.c | 5 ++++- 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index 1a27396b6ea0..d455bef39e9c 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h @@ -729,6 +729,18 @@ extern int direct_gbpages; void init_mem_mapping(void); void early_alloc_pgt_buf(void); +#ifdef CONFIG_X86_64 +/* Realmode trampoline initialization. */ +extern pgd_t trampoline_pgd_entry; +static inline void __meminit init_trampoline(void) +{ + /* Default trampoline pgd value */ + trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)]; +} +#else +static inline void init_trampoline(void) { } +#endif + /* local pte updates need not use xchg for locking */ static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) { diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index 372aad2b3291..4252acdfcbbd 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -590,6 +590,9 @@ void __init init_mem_mapping(void) /* the ISA range is always mapped regardless of memory holes */ init_memory_mapping(0, ISA_END_ADDRESS); + /* Init the trampoline, possibly with KASLR memory offset */ + init_trampoline(); + /* * If the allocation is in bottom-up direction, we setup direct mapping * in bottom-up, otherwise we setup direct mapping in top-down. diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index 0b7a63d98440..705e3fffb4a1 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -8,6 +8,9 @@ struct real_mode_header *real_mode_header; u32 *trampoline_cr4_features; +/* Hold the pgd entry used on booting additional CPUs */ +pgd_t trampoline_pgd_entry; + void __init reserve_real_mode(void) { phys_addr_t mem; @@ -84,7 +87,7 @@ void __init setup_real_mode(void) *trampoline_cr4_features = __read_cr4(); trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd); - trampoline_pgd[0] = init_level4_pgt[pgd_index(__PAGE_OFFSET)].pgd; + trampoline_pgd[0] = trampoline_pgd_entry.pgd; trampoline_pgd[511] = init_level4_pgt[511].pgd; #endif } -- 2.7.4
next prev parent reply other threads:[~2016-06-22 0:49 UTC|newest] Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-22 0:46 [PATCH v7 0/9] x86/mm: memory area address KASLR Kees Cook 2016-06-22 0:46 ` [kernel-hardening] " Kees Cook 2016-06-22 0:46 ` [PATCH v7 1/9] x86/mm: Refactor KASLR entropy functions Kees Cook 2016-06-22 0:46 ` [kernel-hardening] " Kees Cook 2016-07-08 20:33 ` [tip:x86/boot] " tip-bot for Thomas Garnier 2016-06-22 0:46 ` [PATCH v7 2/9] x86/mm: Update physical mapping variable names (x86_64) Kees Cook 2016-06-22 0:46 ` [kernel-hardening] " Kees Cook 2016-07-08 20:34 ` [tip:x86/boot] x86/mm: Update physical mapping variable names tip-bot for Thomas Garnier 2016-06-22 0:47 ` [PATCH v7 3/9] x86/mm: PUD VA support for physical mapping (x86_64) Kees Cook 2016-06-22 0:47 ` [kernel-hardening] " Kees Cook 2016-07-08 20:34 ` [tip:x86/boot] x86/mm: Add PUD VA support for physical mapping tip-bot for Thomas Garnier 2016-06-22 0:47 ` Kees Cook [this message] 2016-06-22 0:47 ` [kernel-hardening] [PATCH v7 4/9] x86/mm: Separate variable for trampoline PGD (x86_64) Kees Cook 2016-07-08 20:35 ` [tip:x86/boot] x86/mm: Separate variable for trampoline PGD tip-bot for Thomas Garnier 2016-06-22 0:47 ` [PATCH v7 5/9] x86/mm: Implement ASLR for kernel memory regions (x86_64) Kees Cook 2016-06-22 0:47 ` [kernel-hardening] " Kees Cook 2016-07-08 20:35 ` [tip:x86/boot] x86/mm: Implement ASLR for kernel memory regions tip-bot for Thomas Garnier 2016-06-22 0:47 ` [PATCH v7 6/9] x86/mm: Enable KASLR for physical mapping memory region (x86_64) Kees Cook 2016-06-22 0:47 ` [kernel-hardening] " Kees Cook 2016-07-08 20:35 ` [tip:x86/boot] x86/mm: Enable KASLR for physical mapping memory regions tip-bot for Thomas Garnier 2016-08-14 4:25 ` Brian Gerst 2016-08-14 23:26 ` Baoquan He 2016-08-16 11:31 ` Brian Gerst 2016-08-16 13:42 ` Borislav Petkov 2016-08-16 13:49 ` Borislav Petkov 2016-08-16 15:54 ` Borislav Petkov 2016-08-16 17:50 ` Borislav Petkov 2016-08-16 19:49 ` Kees Cook 2016-08-16 21:01 ` Borislav Petkov 2016-08-17 0:31 ` Brian Gerst 2016-08-17 9:11 ` Borislav Petkov 2016-08-17 10:19 ` Ingo Molnar 2016-08-17 11:33 ` Borislav Petkov 2016-08-18 10:49 ` [tip:x86/urgent] x86/microcode/AMD: Fix initrd loading with CONFIG_RANDOMIZE_MEMORY=y tip-bot for Borislav Petkov 2016-06-22 0:47 ` [PATCH v7 7/9] x86/mm: Enable KASLR for vmalloc memory region (x86_64) Kees Cook 2016-06-22 0:47 ` [kernel-hardening] " Kees Cook 2016-07-08 20:36 ` [tip:x86/boot] x86/mm: Enable KASLR for vmalloc memory regions tip-bot for Thomas Garnier 2016-06-22 0:47 ` [PATCH v7 8/9] x86/mm: Enable KASLR for vmemmap memory region (x86_64) Kees Cook 2016-06-22 0:47 ` [kernel-hardening] " Kees Cook 2016-06-22 0:47 ` [PATCH v7 9/9] x86/mm: Memory hotplug support for KASLR memory randomization (x86_64) Kees Cook 2016-06-22 0:47 ` [kernel-hardening] " Kees Cook 2016-07-08 20:36 ` [tip:x86/boot] x86/mm: Add memory hotplug support for KASLR memory randomization tip-bot for Thomas Garnier 2016-06-22 12:47 ` [kernel-hardening] [PATCH v7 0/9] x86/mm: memory area address KASLR Jason Cooper 2016-06-22 15:59 ` Thomas Garnier 2016-06-22 17:05 ` Kees Cook 2016-06-22 17:05 ` Kees Cook 2016-06-23 19:33 ` Jason Cooper 2016-06-23 19:33 ` Jason Cooper 2016-06-23 19:45 ` Sandy Harris 2016-06-23 19:59 ` Kees Cook 2016-06-23 19:59 ` Kees Cook 2016-06-23 20:19 ` Jason Cooper 2016-06-23 20:16 ` Jason Cooper 2016-06-23 19:58 ` Kees Cook 2016-06-23 19:58 ` Kees Cook 2016-06-23 20:05 ` Ard Biesheuvel 2016-06-23 20:05 ` Ard Biesheuvel 2016-06-24 1:11 ` Jason Cooper 2016-06-24 1:11 ` Jason Cooper 2016-06-24 10:54 ` Ard Biesheuvel 2016-06-24 10:54 ` Ard Biesheuvel 2016-06-24 16:02 ` devicetree random-seed properties, was: "Re: [PATCH v7 0/9] x86/mm: memory area address KASLR" Jason Cooper 2016-06-24 16:02 ` [kernel-hardening] " Jason Cooper 2016-06-24 19:04 ` Kees Cook 2016-06-24 19:04 ` [kernel-hardening] " Kees Cook 2016-06-24 20:40 ` Andy Lutomirski 2016-06-24 20:40 ` [kernel-hardening] " Andy Lutomirski 2016-06-30 21:48 ` Jason Cooper 2016-06-30 21:48 ` [kernel-hardening] " Jason Cooper 2016-06-30 21:56 ` Thomas Garnier 2016-06-30 21:48 ` Jason Cooper 2016-06-30 21:48 ` [kernel-hardening] " Jason Cooper 2016-07-07 22:24 ` [PATCH v7 0/9] x86/mm: memory area address KASLR Kees Cook 2016-07-07 22:24 ` [kernel-hardening] " Kees Cook
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