From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47915) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bIMSh-0000dd-RS for qemu-devel@nongnu.org; Wed, 29 Jun 2016 16:52:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bIMSc-0002JE-7H for qemu-devel@nongnu.org; Wed, 29 Jun 2016 16:51:54 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:48370) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bIMSb-0002J4-UY for qemu-devel@nongnu.org; Wed, 29 Jun 2016 16:51:50 -0400 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u5TKhTI7025508 for ; Wed, 29 Jun 2016 16:51:49 -0400 Received: from e33.co.us.ibm.com (e33.co.us.ibm.com [32.97.110.151]) by mx0a-001b2d01.pphosted.com with ESMTP id 23usuauxu2-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 29 Jun 2016 16:51:49 -0400 Received: from localhost by e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 29 Jun 2016 14:51:48 -0600 From: Greg Kurz Date: Wed, 29 Jun 2016 22:51:38 +0200 In-Reply-To: <146723340662.9665.6413150884317978000.stgit@bahia.lan> References: <146723340662.9665.6413150884317978000.stgit@bahia.lan> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <146723349880.9665.13394861227888249114.stgit@bahia.lan> Subject: [Qemu-devel] [PATCH 7/8] cpu: add initialization helper without realize List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: Peter Crosthwaite , Benjamin Herrenschmidt , Alexander Graf , qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Cedric Le Goater , bharata@linux.vnet.ibm.com, Scott Wood , Paolo Bonzini , Richard Henderson This will allow PowerPC machines to compute the device-tree cpu id between initialization and realization of the cpu. Signed-off-by: Greg Kurz --- include/qom/cpu.h | 12 ++++++++++++ qom/cpu.c | 19 ++++++++++++++++--- 2 files changed, 28 insertions(+), 3 deletions(-) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 63e77607f644..8b3adbbff060 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -557,8 +557,20 @@ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); */ CPUState *cpu_generic_init(const char *typename, const char *cpu_model); /** + * cpu_generic_init_no_realize: + * @typename: The CPU base type. + * @cpu_model: The model string including optional parameters. + * + * Instantiates a CPU, processes optional parameters. + * + * Returns: A #CPUState or %NULL if an error occurred. + */ +CPUState *cpu_generic_init_no_realize(const char *typename, + const char *cpu_model); + +/** * cpu_has_work: * @cpu: The vCPU to check. * * Checks whether the CPU has work to do. diff --git a/qom/cpu.c b/qom/cpu.c index 751e992de882..dfe3289991ab 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -42,9 +42,10 @@ bool cpu_exists(int64_t id) } return false; } -CPUState *cpu_generic_init(const char *typename, const char *cpu_model) +static CPUState *cpu_generic_init_common(const char *typename, + const char *cpu_model, bool realize) { char *str, *name, *featurestr; CPUState *cpu; ObjectClass *oc; @@ -69,10 +70,11 @@ CPUState *cpu_generic_init(const char *typename, const char *cpu_model) if (err != NULL) { goto out; } - object_property_set_bool(OBJECT(cpu), true, "realized", &err); - + if (realize) { + object_property_set_bool(OBJECT(cpu), true, "realized", &err); + } out: if (err != NULL) { error_report_err(err); object_unref(OBJECT(cpu)); @@ -81,8 +83,19 @@ out: return cpu; } +CPUState *cpu_generic_init(const char *typename, const char *cpu_model) +{ + return cpu_generic_init_common(typename, cpu_model, true); +} + +CPUState *cpu_generic_init_no_realize(const char *typename, + const char *cpu_model) +{ + return cpu_generic_init_common(typename, cpu_model, false); +} + bool cpu_paging_enabled(const CPUState *cpu) { CPUClass *cc = CPU_GET_CLASS(cpu);