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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [CI 03/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
Date: Thu, 30 Jun 2016 15:32:46 +0100	[thread overview]
Message-ID: <1467297225-21379-3-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1467297225-21379-1-git-send-email-chris@chris-wilson.co.uk>

By using the out-of-line intel_wait_for_register() not only do we can
efficiency from using the hybrid wait_for() contained within, but we
avoid code bloat from the numerous inlined loops, in total (all patches):

   text    data     bss     dec     hex filename
1078551    4557     416 1083524  108884 drivers/gpu/drm/i915/i915.ko
1070775    4557     416 1075748  106a24 drivers/gpu/drm/i915/i915.ko

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b98afbd33235..51eb1cd86957 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2535,8 +2535,6 @@ int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool force_on)
 	u32 val;
 	int err;
 
-#define COND (I915_READ(VLV_GTLC_SURVIVABILITY_REG) & VLV_GFX_CLK_STATUS_BIT)
-
 	val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);
 	val &= ~VLV_GFX_CLK_FORCE_ON_BIT;
 	if (force_on)
@@ -2546,13 +2544,16 @@ int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool force_on)
 	if (!force_on)
 		return 0;
 
-	err = wait_for(COND, 20);
+	err = intel_wait_for_register(dev_priv,
+				      VLV_GTLC_SURVIVABILITY_REG,
+				      VLV_GFX_CLK_STATUS_BIT,
+				      VLV_GFX_CLK_STATUS_BIT,
+				      20);
 	if (err)
 		DRM_ERROR("timeout waiting for GFX clock force-on (%08x)\n",
 			  I915_READ(VLV_GTLC_SURVIVABILITY_REG));
 
 	return err;
-#undef COND
 }
 
 static int vlv_allow_gt_wake(struct drm_i915_private *dev_priv, bool allow)
-- 
2.8.1

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  parent reply	other threads:[~2016-06-30 14:33 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-30 14:32 [CI 01/62] drm/i915: Use a hybrid scheme for fast register waits Chris Wilson
2016-06-30 14:32 ` [CI 02/62] drm/i915: Convert sandybridge_pcode_*() to use intel_wait_for_register() Chris Wilson
2016-06-30 14:32 ` Chris Wilson [this message]
2016-06-30 14:32 ` [CI 04/62] drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register() Chris Wilson
2016-06-30 14:32 ` [CI 05/62] " Chris Wilson
2016-06-30 14:32 ` [CI 06/62] " Chris Wilson
2016-06-30 14:32 ` [CI 07/62] " Chris Wilson
2016-06-30 14:32 ` [CI 08/62] " Chris Wilson
2016-06-30 14:32 ` [CI 09/62] " Chris Wilson
2016-06-30 14:32 ` [CI 10/62] " Chris Wilson
2016-06-30 14:32 ` [CI 11/62] " Chris Wilson
2016-06-30 14:32 ` [CI 12/62] " Chris Wilson
2016-06-30 14:32 ` [CI 13/62] " Chris Wilson
2016-06-30 14:32 ` [CI 14/62] " Chris Wilson
2016-06-30 14:32 ` [CI 15/62] " Chris Wilson
2016-06-30 14:32 ` [CI 16/62] " Chris Wilson
2016-06-30 14:33 ` [CI 17/62] " Chris Wilson
2016-06-30 14:33 ` [CI 18/62] " Chris Wilson
2016-06-30 14:33 ` [CI 19/62] " Chris Wilson
2016-06-30 14:33 ` [CI 20/62] " Chris Wilson
2016-06-30 14:33 ` [CI 21/62] " Chris Wilson
2016-06-30 14:33 ` [CI 22/62] " Chris Wilson
2016-06-30 14:33 ` [CI 23/62] " Chris Wilson
2016-06-30 14:33 ` [CI 24/62] " Chris Wilson
2016-06-30 14:33 ` [CI 25/62] " Chris Wilson
2016-06-30 14:33 ` [CI 26/62] " Chris Wilson
2016-06-30 14:33 ` [CI 27/62] " Chris Wilson
2016-06-30 14:33 ` [CI 28/62] " Chris Wilson
2016-06-30 14:33 ` [CI 29/62] " Chris Wilson
2016-06-30 14:33 ` [CI 30/62] " Chris Wilson
2016-06-30 14:33 ` [CI 31/62] " Chris Wilson
2016-06-30 14:33 ` [CI 32/62] " Chris Wilson
2016-06-30 14:33 ` [CI 33/62] " Chris Wilson
2016-06-30 14:33 ` [CI 34/62] " Chris Wilson
2016-06-30 14:33 ` [CI 35/62] " Chris Wilson
2016-06-30 14:33 ` [CI 36/62] " Chris Wilson
2016-06-30 14:33 ` [CI 37/62] " Chris Wilson
2016-06-30 14:33 ` [CI 38/62] " Chris Wilson
2016-06-30 14:33 ` [CI 39/62] " Chris Wilson
2016-06-30 14:33 ` [CI 40/62] " Chris Wilson
2016-06-30 14:33 ` [CI 41/62] " Chris Wilson
2016-06-30 14:33 ` [CI 42/62] " Chris Wilson
2016-06-30 14:33 ` [CI 43/62] " Chris Wilson
2016-06-30 14:33 ` [CI 44/62] " Chris Wilson
2016-06-30 14:33 ` [CI 45/62] " Chris Wilson
2016-06-30 14:33 ` [CI 46/62] " Chris Wilson
2016-06-30 14:33 ` [CI 47/62] " Chris Wilson
2016-06-30 14:33 ` [CI 48/62] " Chris Wilson
2016-06-30 14:33 ` [CI 49/62] " Chris Wilson
2016-06-30 14:33 ` [CI 50/62] " Chris Wilson
2016-06-30 14:33 ` [CI 51/62] " Chris Wilson
2016-06-30 14:33 ` [CI 52/62] " Chris Wilson
2016-06-30 14:33 ` [CI 53/62] " Chris Wilson
2016-06-30 14:33 ` [CI 54/62] " Chris Wilson
2016-06-30 14:33 ` [CI 55/62] " Chris Wilson
2016-06-30 14:33 ` [CI 56/62] " Chris Wilson
2016-06-30 14:33 ` [CI 57/62] " Chris Wilson
2016-06-30 14:33 ` [CI 58/62] " Chris Wilson
2016-06-30 14:33 ` [CI 59/62] " Chris Wilson
2016-06-30 14:33 ` [CI 60/62] " Chris Wilson
2016-06-30 14:33 ` [CI 61/62] " Chris Wilson
2016-06-30 14:33 ` [CI 62/62] drm/i915: Perform Sandybridge BSD tail write under the forcewake Chris Wilson
2016-06-30 14:58 ` ✗ Ro.CI.BAT: warning for series starting with [CI,01/62] drm/i915: Use a hybrid scheme for fast register waits Patchwork

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