From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:55150)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <kraxel@redhat.com>) id 1bIx9l-0004Ou-6R
	for qemu-devel@nongnu.org; Fri, 01 Jul 2016 08:02:50 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <kraxel@redhat.com>) id 1bIx9h-0004yg-1N
	for qemu-devel@nongnu.org; Fri, 01 Jul 2016 08:02:48 -0400
Received: from mx1.redhat.com ([209.132.183.28]:33042)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <kraxel@redhat.com>) id 1bIx9g-0004yV-Sr
	for qemu-devel@nongnu.org; Fri, 01 Jul 2016 08:02:44 -0400
Message-ID: <1467374562.15123.108.camel@redhat.com>
From: Gerd Hoffmann <kraxel@redhat.com>
Date: Fri, 01 Jul 2016 14:02:42 +0200
In-Reply-To: <20160622065324.23812-1-haozhong.zhang@intel.com>
References: <20160622065324.23812-1-haozhong.zhang@intel.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Mime-Version: 1.0
Subject: Re: [Qemu-devel] [SeaBIOS] [PATCH v3] fw/msr_feature_control: add
 support to set MSR_IA32_FEATURE_CONTROL
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Haozhong Zhang <haozhong.zhang@intel.com>
Cc: seabios@seabios.org, Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org

On Mi, 2016-06-22 at 14:53 +0800, Haozhong Zhang wrote:
> OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
> for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
> "etc/msr_feature_control" to advise bits that should be set in
> MSR_IA32_FEATURE_CONTROL. If this file exists, SeaBIOS will set the
> advised bits in that MSR.

Committed to master, cherry-picked into 1.9-stable.

thanks,
  Gerd