From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755010AbcGEN2m (ORCPT ); Tue, 5 Jul 2016 09:28:42 -0400 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:48101 "EHLO metis.ext.4.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754943AbcGEN2k (ORCPT ); Tue, 5 Jul 2016 09:28:40 -0400 Message-ID: <1467725309.2978.63.camel@pengutronix.de> Subject: Re: [PATCH 3/4] drivers: reset: Add STM32 reset driver From: Philipp Zabel To: gabriel.fernandez@st.com Cc: Rob Herring , Mark Rutland , Maxime Coquelin , Russell King , patrice.chotard@st.com, alexandre.torgue@st.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Tue, 05 Jul 2016 15:28:29 +0200 In-Reply-To: <1467640052-6770-3-git-send-email-gabriel.fernandez@st.com> References: <1467640052-6770-1-git-send-email-gabriel.fernandez@st.com> <1467640052-6770-3-git-send-email-gabriel.fernandez@st.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:100:96de:80ff:fec2:9969 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Montag, den 04.07.2016, 15:47 +0200 schrieb gabriel.fernandez@st.com: > From: Gabriel Fernandez > > The STM32 MCUs family IPs can be reset by accessing some registers > from the RCC block. > > The list of available reset lines is documented in the DT bindings. > > Signed-off-by: Maxime Coquelin > Signed-off-by: Gabriel Fernandez > --- > drivers/reset/Makefile | 1 + > drivers/reset/reset-stm32.c | 113 ++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 114 insertions(+) > create mode 100644 drivers/reset/reset-stm32.c > > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile > index 03dc1bb..3776b7b 100644 > --- a/drivers/reset/Makefile > +++ b/drivers/reset/Makefile > @@ -4,6 +4,7 @@ obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o > obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o > obj-$(CONFIG_MACH_PISTACHIO) += reset-pistachio.o > obj-$(CONFIG_ARCH_MESON) += reset-meson.o > +obj-$(CONFIG_ARCH_STM32) += reset-stm32.o > obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o > obj-$(CONFIG_ARCH_STI) += sti/ > obj-$(CONFIG_ARCH_HISI) += hisilicon/ > diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c > new file mode 100644 > index 0000000..be42bff > --- /dev/null > +++ b/drivers/reset/reset-stm32.c > @@ -0,0 +1,113 @@ > +/* > + * Copyright (C) Maxime Coquelin 2015 > + * Author: Maxime Coquelin > + * License terms: GNU General Public License (GPL), version 2 > + * > + * Heavily based on sunxi driver from Maxime Ripard. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +struct stm32_reset_data { > + spinlock_t lock; > + void __iomem *membase; > + struct reset_controller_dev rcdev; > +}; > + > +static int stm32_reset_assert(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct stm32_reset_data *data = container_of(rcdev, > + struct stm32_reset_data, > + rcdev); > + int bank = id / BITS_PER_LONG; > + int offset = id % BITS_PER_LONG; > + unsigned long flags; > + u32 reg; > + > + spin_lock_irqsave(&data->lock, flags); > + > + reg = readl_relaxed(data->membase + (bank * 4)); > + writel_relaxed(reg | BIT(offset), data->membase + (bank * 4)); Please also switch to the non-relaxed variants. It shouldn't make a difference here, and as Arnd points out, reduces the risk of new developers using readl/writel_relaxed without thinking about the consequences. Further, this will make the stm32, sunxi, and socfpga accessors look the same. I'd like to try and combine them after this is merged. regards Philipp From mboxrd@z Thu Jan 1 00:00:00 1970 From: Philipp Zabel Subject: Re: [PATCH 3/4] drivers: reset: Add STM32 reset driver Date: Tue, 05 Jul 2016 15:28:29 +0200 Message-ID: <1467725309.2978.63.camel@pengutronix.de> References: <1467640052-6770-1-git-send-email-gabriel.fernandez@st.com> <1467640052-6770-3-git-send-email-gabriel.fernandez@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1467640052-6770-3-git-send-email-gabriel.fernandez-qxv4g6HH51o@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: gabriel.fernandez-qxv4g6HH51o@public.gmane.org Cc: Rob Herring , Mark Rutland , Maxime Coquelin , Russell King , patrice.chotard-qxv4g6HH51o@public.gmane.org, alexandre.torgue-qxv4g6HH51o@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org Am Montag, den 04.07.2016, 15:47 +0200 schrieb gabriel.fernandez-qxv4g6HH51o@public.gmane.org: > From: Gabriel Fernandez > > The STM32 MCUs family IPs can be reset by accessing some registers > from the RCC block. > > The list of available reset lines is documented in the DT bindings. > > Signed-off-by: Maxime Coquelin > Signed-off-by: Gabriel Fernandez > --- > drivers/reset/Makefile | 1 + > drivers/reset/reset-stm32.c | 113 ++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 114 insertions(+) > create mode 100644 drivers/reset/reset-stm32.c > > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile > index 03dc1bb..3776b7b 100644 > --- a/drivers/reset/Makefile > +++ b/drivers/reset/Makefile > @@ -4,6 +4,7 @@ obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o > obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o > obj-$(CONFIG_MACH_PISTACHIO) += reset-pistachio.o > obj-$(CONFIG_ARCH_MESON) += reset-meson.o > +obj-$(CONFIG_ARCH_STM32) += reset-stm32.o > obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o > obj-$(CONFIG_ARCH_STI) += sti/ > obj-$(CONFIG_ARCH_HISI) += hisilicon/ > diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c > new file mode 100644 > index 0000000..be42bff > --- /dev/null > +++ b/drivers/reset/reset-stm32.c > @@ -0,0 +1,113 @@ > +/* > + * Copyright (C) Maxime Coquelin 2015 > + * Author: Maxime Coquelin > + * License terms: GNU General Public License (GPL), version 2 > + * > + * Heavily based on sunxi driver from Maxime Ripard. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +struct stm32_reset_data { > + spinlock_t lock; > + void __iomem *membase; > + struct reset_controller_dev rcdev; > +}; > + > +static int stm32_reset_assert(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct stm32_reset_data *data = container_of(rcdev, > + struct stm32_reset_data, > + rcdev); > + int bank = id / BITS_PER_LONG; > + int offset = id % BITS_PER_LONG; > + unsigned long flags; > + u32 reg; > + > + spin_lock_irqsave(&data->lock, flags); > + > + reg = readl_relaxed(data->membase + (bank * 4)); > + writel_relaxed(reg | BIT(offset), data->membase + (bank * 4)); Please also switch to the non-relaxed variants. It shouldn't make a difference here, and as Arnd points out, reduces the risk of new developers using readl/writel_relaxed without thinking about the consequences. Further, this will make the stm32, sunxi, and socfpga accessors look the same. I'd like to try and combine them after this is merged. regards Philipp -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: p.zabel@pengutronix.de (Philipp Zabel) Date: Tue, 05 Jul 2016 15:28:29 +0200 Subject: [PATCH 3/4] drivers: reset: Add STM32 reset driver In-Reply-To: <1467640052-6770-3-git-send-email-gabriel.fernandez@st.com> References: <1467640052-6770-1-git-send-email-gabriel.fernandez@st.com> <1467640052-6770-3-git-send-email-gabriel.fernandez@st.com> Message-ID: <1467725309.2978.63.camel@pengutronix.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Am Montag, den 04.07.2016, 15:47 +0200 schrieb gabriel.fernandez at st.com: > From: Gabriel Fernandez > > The STM32 MCUs family IPs can be reset by accessing some registers > from the RCC block. > > The list of available reset lines is documented in the DT bindings. > > Signed-off-by: Maxime Coquelin > Signed-off-by: Gabriel Fernandez > --- > drivers/reset/Makefile | 1 + > drivers/reset/reset-stm32.c | 113 ++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 114 insertions(+) > create mode 100644 drivers/reset/reset-stm32.c > > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile > index 03dc1bb..3776b7b 100644 > --- a/drivers/reset/Makefile > +++ b/drivers/reset/Makefile > @@ -4,6 +4,7 @@ obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o > obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o > obj-$(CONFIG_MACH_PISTACHIO) += reset-pistachio.o > obj-$(CONFIG_ARCH_MESON) += reset-meson.o > +obj-$(CONFIG_ARCH_STM32) += reset-stm32.o > obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o > obj-$(CONFIG_ARCH_STI) += sti/ > obj-$(CONFIG_ARCH_HISI) += hisilicon/ > diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c > new file mode 100644 > index 0000000..be42bff > --- /dev/null > +++ b/drivers/reset/reset-stm32.c > @@ -0,0 +1,113 @@ > +/* > + * Copyright (C) Maxime Coquelin 2015 > + * Author: Maxime Coquelin > + * License terms: GNU General Public License (GPL), version 2 > + * > + * Heavily based on sunxi driver from Maxime Ripard. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +struct stm32_reset_data { > + spinlock_t lock; > + void __iomem *membase; > + struct reset_controller_dev rcdev; > +}; > + > +static int stm32_reset_assert(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct stm32_reset_data *data = container_of(rcdev, > + struct stm32_reset_data, > + rcdev); > + int bank = id / BITS_PER_LONG; > + int offset = id % BITS_PER_LONG; > + unsigned long flags; > + u32 reg; > + > + spin_lock_irqsave(&data->lock, flags); > + > + reg = readl_relaxed(data->membase + (bank * 4)); > + writel_relaxed(reg | BIT(offset), data->membase + (bank * 4)); Please also switch to the non-relaxed variants. It shouldn't make a difference here, and as Arnd points out, reduces the risk of new developers using readl/writel_relaxed without thinking about the consequences. Further, this will make the stm32, sunxi, and socfpga accessors look the same. I'd like to try and combine them after this is merged. regards Philipp