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Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 8/9] ppc: Add missing slbfee.
 instruction on ppc64 BookS processors
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To: =?ISO-8859-1?Q?C=E9dric?= Le Goater <clg@kaod.org>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, David Gibson <david@gibson.dropbear.id.au>

On Wed, 2016-07-06 at 08:57 +0200, C=C3=A9dric Le Goater wrote:
>=20
> > The -1 result is now handled in the JITed code to do the right
> thing
> > (well, afaik).
>=20
> well, no. It should be a 0 when the slb is not found, and thus no=C2=A0
> machine check. That is how I understand :=C2=A0

Right, which is afaik what the current qemu code does no ?

The -1 isn't the function return, it's the pointer-argument
return, which goes into rT. This is then handled in the
generated code:

=C2=A0 =C2=A0 gen_helper_find_slb_vsid(cpu_gpr[rS(ctx->opcode)], cpu_env,
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0cpu_gpr[rB(ctx->opcode)]);
=C2=A0=C2=A0=C2=A0=C2=A0l1 =3D gen_new_label();
=C2=A0=C2=A0=C2=A0=C2=A0l2 =3D gen_new_label();
=C2=A0=C2=A0=C2=A0=C2=A0tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so);

We clear CR (except so)

=C2=A0=C2=A0=C2=A0=C2=A0tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rS(ctx->o=
pcode)], -1, l1);

We branch to l1 if rT is -1
=C2=A0
=C2=A0=C2=A0=C2=A0=C2=A0tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 1 << CRF_=
EQ);

We set EQ if we didn't branch

=C2=A0=C2=A0=C2=A0=C2=A0tcg_gen_br(l2);

Then go to l2 (skip the next bit)

=C2=A0=C2=A0=C2=A0=C2=A0gen_set_label(l1);
=C2=A0=C2=A0=C2=A0=C2=A0tcg_gen_movi_tl(cpu_gpr[rS(ctx->opcode)], 0);

We clear rS if it was -1

=C2=A0=C2=A0=C2=A0=C2=A0gen_set_label(l2);