From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752612AbcGUMpU (ORCPT ); Thu, 21 Jul 2016 08:45:20 -0400 Received: from mail-lf0-f42.google.com ([209.85.215.42]:35805 "EHLO mail-lf0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752554AbcGUMkr (ORCPT ); Thu, 21 Jul 2016 08:40:47 -0400 From: Grzegorz Jaszczyk To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: robh+dt@kernel.org, mark.rutland@arm.com, jason@lakedaemon.net, andrew@lunn.ch, sebastian.hesselbarth@gmail.com, linux@armlinux.org.uk, thomas.petazzoni@free-electrons.com, gregory.clement@free-electrons.com, mw@semihalf.com, jaz@semihalf.com, alior@marvell.com Subject: [PATCH 08/18] ARM: mvebu: a39x: enable PMU, CA9 MPcore SoC Controller and Coherency fabric Date: Thu, 21 Jul 2016 14:44:04 +0200 Message-Id: <1469105055-25181-9-git-send-email-jaz@semihalf.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1469105055-25181-1-git-send-email-jaz@semihalf.com> References: <1469105055-25181-1-git-send-email-jaz@semihalf.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This commit enables: - CA9's Performance Monitor Unit - CA9 MPcore SoC Controller - Coherency fabric on Armada 39x, basing on the Armada 38x (which has the same CA9 CPU). Signed-off-by: Grzegorz Jaszczyk Reviewed-by: Lior Amsalem --- arch/arm/boot/dts/armada-39x.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi index cb66f20..8a22c02 100644 --- a/arch/arm/boot/dts/armada-39x.dtsi +++ b/arch/arm/boot/dts/armada-39x.dtsi @@ -78,6 +78,11 @@ }; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts-extended = <&mpic 3>; + }; + soc { compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus", "simple-bus"; @@ -322,6 +327,16 @@ reg = <0x20800 0x10>; }; + mpcore-soc-ctrl@20d20 { + compatible = "marvell,armada-380-mpcore-soc-ctrl"; + reg = <0x20d20 0x6c>; + }; + + coherency-fabric@21010 { + compatible = "marvell,armada-380-coherency-fabric"; + reg = <0x21010 0x1c>; + }; + pmsu@22000 { compatible = "marvell,armada-390-pmsu", "marvell,armada-380-pmsu"; -- 1.8.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Grzegorz Jaszczyk Subject: [PATCH 08/18] ARM: mvebu: a39x: enable PMU, CA9 MPcore SoC Controller and Coherency fabric Date: Thu, 21 Jul 2016 14:44:04 +0200 Message-ID: <1469105055-25181-9-git-send-email-jaz@semihalf.com> References: <1469105055-25181-1-git-send-email-jaz@semihalf.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1469105055-25181-1-git-send-email-jaz@semihalf.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: mark.rutland@arm.com, andrew@lunn.ch, jason@lakedaemon.net, jaz@semihalf.com, linux@armlinux.org.uk, alior@marvell.com, robh+dt@kernel.org, gregory.clement@free-electrons.com, mw@semihalf.com, thomas.petazzoni@free-electrons.com, sebastian.hesselbarth@gmail.com List-Id: devicetree@vger.kernel.org This commit enables: - CA9's Performance Monitor Unit - CA9 MPcore SoC Controller - Coherency fabric on Armada 39x, basing on the Armada 38x (which has the same CA9 CPU). Signed-off-by: Grzegorz Jaszczyk Reviewed-by: Lior Amsalem --- arch/arm/boot/dts/armada-39x.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi index cb66f20..8a22c02 100644 --- a/arch/arm/boot/dts/armada-39x.dtsi +++ b/arch/arm/boot/dts/armada-39x.dtsi @@ -78,6 +78,11 @@ }; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts-extended = <&mpic 3>; + }; + soc { compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus", "simple-bus"; @@ -322,6 +327,16 @@ reg = <0x20800 0x10>; }; + mpcore-soc-ctrl@20d20 { + compatible = "marvell,armada-380-mpcore-soc-ctrl"; + reg = <0x20d20 0x6c>; + }; + + coherency-fabric@21010 { + compatible = "marvell,armada-380-coherency-fabric"; + reg = <0x21010 0x1c>; + }; + pmsu@22000 { compatible = "marvell,armada-390-pmsu", "marvell,armada-380-pmsu"; -- 1.8.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: jaz@semihalf.com (Grzegorz Jaszczyk) Date: Thu, 21 Jul 2016 14:44:04 +0200 Subject: [PATCH 08/18] ARM: mvebu: a39x: enable PMU, CA9 MPcore SoC Controller and Coherency fabric In-Reply-To: <1469105055-25181-1-git-send-email-jaz@semihalf.com> References: <1469105055-25181-1-git-send-email-jaz@semihalf.com> Message-ID: <1469105055-25181-9-git-send-email-jaz@semihalf.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This commit enables: - CA9's Performance Monitor Unit - CA9 MPcore SoC Controller - Coherency fabric on Armada 39x, basing on the Armada 38x (which has the same CA9 CPU). Signed-off-by: Grzegorz Jaszczyk Reviewed-by: Lior Amsalem --- arch/arm/boot/dts/armada-39x.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi index cb66f20..8a22c02 100644 --- a/arch/arm/boot/dts/armada-39x.dtsi +++ b/arch/arm/boot/dts/armada-39x.dtsi @@ -78,6 +78,11 @@ }; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts-extended = <&mpic 3>; + }; + soc { compatible = "marvell,armada390-mbus", "marvell,armadaxp-mbus", "simple-bus"; @@ -322,6 +327,16 @@ reg = <0x20800 0x10>; }; + mpcore-soc-ctrl at 20d20 { + compatible = "marvell,armada-380-mpcore-soc-ctrl"; + reg = <0x20d20 0x6c>; + }; + + coherency-fabric at 21010 { + compatible = "marvell,armada-380-coherency-fabric"; + reg = <0x21010 0x1c>; + }; + pmsu at 22000 { compatible = "marvell,armada-390-pmsu", "marvell,armada-380-pmsu"; -- 1.8.3.1