From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37588) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQI8e-0000mF-9k for qemu-devel@nongnu.org; Thu, 21 Jul 2016 13:52:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bQI8c-00027J-Cv for qemu-devel@nongnu.org; Thu, 21 Jul 2016 13:51:59 -0400 Received: from mx1.redhat.com ([209.132.183.28]:60151) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQI8c-000278-6x for qemu-devel@nongnu.org; Thu, 21 Jul 2016 13:51:58 -0400 Date: Thu, 21 Jul 2016 20:51:53 +0300 From: "Michael S. Tsirkin" Message-ID: <1469123413-20809-13-git-send-email-mst@redhat.com> References: <1469123413-20809-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1469123413-20809-1-git-send-email-mst@redhat.com> Subject: [Qemu-devel] [PULL v5 12/57] x86-iommu: introduce "intremap" property List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Peter Xu , Paolo Bonzini , Richard Henderson , Eduardo Habkost From: Peter Xu Adding one property for intel-iommu devices to specify whether we should support interrupt remapping. By default, IR is disabled. To enable it, we should use (take Intel IOMMU as example): -device intel_iommu,intremap=on This property can be shared by Intel and future AMD IOMMUs. Signed-off-by: Peter Xu Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/i386/x86-iommu.h | 1 + hw/i386/x86-iommu.c | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index b2401a6..699dd06 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -43,6 +43,7 @@ struct X86IOMMUClass { struct X86IOMMUState { SysBusDevice busdev; + bool intr_supported; /* Whether vIOMMU supports IR */ }; /** diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index f395139..4280839 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -59,9 +59,32 @@ static void x86_iommu_class_init(ObjectClass *klass, void *data) dc->realize = x86_iommu_realize; } +static bool x86_iommu_intremap_prop_get(Object *o, Error **errp) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + return s->intr_supported; +} + +static void x86_iommu_intremap_prop_set(Object *o, bool value, Error **errp) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + s->intr_supported = value; +} + +static void x86_iommu_instance_init(Object *o) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + + /* By default, do not support IR */ + s->intr_supported = false; + object_property_add_bool(o, "intremap", x86_iommu_intremap_prop_get, + x86_iommu_intremap_prop_set, NULL); +} + static const TypeInfo x86_iommu_info = { .name = TYPE_X86_IOMMU_DEVICE, .parent = TYPE_SYS_BUS_DEVICE, + .instance_init = x86_iommu_instance_init, .instance_size = sizeof(X86IOMMUState), .class_init = x86_iommu_class_init, .class_size = sizeof(X86IOMMUClass), -- MST