From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51352) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQsYW-0002CT-8b for qemu-devel@nongnu.org; Sat, 23 Jul 2016 04:45:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bQsYT-00073o-2m for qemu-devel@nongnu.org; Sat, 23 Jul 2016 04:45:08 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:51195 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQsYS-00073a-Tv for qemu-devel@nongnu.org; Sat, 23 Jul 2016 04:45:04 -0400 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u6N8hfo5077753 for ; Sat, 23 Jul 2016 04:45:02 -0400 Received: from e23smtp02.au.ibm.com (e23smtp02.au.ibm.com [202.81.31.144]) by mx0a-001b2d01.pphosted.com with ESMTP id 24c4ju10gn-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Sat, 23 Jul 2016 04:45:01 -0400 Received: from localhost by e23smtp02.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Sat, 23 Jul 2016 18:44:59 +1000 From: Nikunj A Dadhania Date: Sat, 23 Jul 2016 14:14:37 +0530 Message-Id: <1469263490-19130-1-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [RFC v2 00/13] POWER9 TCG enablements - part1 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com This set starts adding new instructions for POWER9 described in ISA3.0. Patches: 01-02: First two patches adds the required POWER9 cpu model and ISA defines. 03-12: Adds following instructions: addpcis : Add PC Immediate Shifted cmprb : Compare Ranged Byte moduw : Modulo Unsigned Word modsw : Modulo Signed Word modud : Modulo Unsigned Dword modsd : Modulo Signed Dword cnttzd[.] : Count Trailing Zero Dword cnttzw[.] : Count Trailing Zero Word cmpeqb : Compare Equal Byte setb : Set Boolean maddld : Multiply-Add Low Dword maddhd : Multiply-Add High Dword maddhdu : Multiply-Add High Dword Unsigned 13: Adds support for the new Expanded Opcode (EO) added in ISA3.0 Thanks to Richard, David and Bharata for their valuable feedback. Changelog: v1: * addpcis - shift the immediate before adding * cmprb logic without branches * mod[su][wd]: use helpers * cmpeqb - use bit magics in the helpers * setb - bug fix and branchless * maddld - discard multiple dword calculation as we need only lower 64-bit * Expanded opcode - drop pad from 32-bit and free the third level indirect table in unrealize Aneesh Kumar K.V (1): target-ppc: Introduce Power9 family Nikunj A Dadhania (10): target-ppc: Introduce POWER ISA 3.0 flag target-ppc: adding addpcis instruction target-ppc: add cmprb instruction target-ppc: add modulo word operations target-ppc: add modulo dword operations target-ppc: add cnttzw[.] instruction target-ppc: add cmpeqb instruction target-ppc: add maddld instruction target-ppc: add maddhd and maddhdu instruction target-ppc: introduce opc4 for Expanded Opcode Sandipan Das (1): target-ppc: add cnttzd[.] instruction Vivek Andrew Sha (1): target-ppc: add setb instruction hw/ppc/spapr_cpu_core.c | 5 + target-ppc/cpu-models.c | 5 + target-ppc/cpu-models.h | 1 + target-ppc/cpu-qom.h | 7 ++ target-ppc/cpu.h | 5 +- target-ppc/helper.h | 7 ++ target-ppc/int_helper.c | 63 ++++++++++ target-ppc/mmu_helper.c | 3 +- target-ppc/translate.c | 274 ++++++++++++++++++++++++++++++++++++++++---- target-ppc/translate_init.c | 211 ++++++++++++++++++++++++++++------ 10 files changed, 524 insertions(+), 57 deletions(-) -- 2.7.4