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Violators will be prosecuted for from ; Mon, 1 Aug 2016 17:20:02 +1000 From: Rajalakshmi Srinivasaraghavan Date: Mon, 1 Aug 2016 12:49:38 +0530 In-Reply-To: <1470035982-31658-1-git-send-email-raji@linux.vnet.ibm.com> References: <1470035982-31658-1-git-send-email-raji@linux.vnet.ibm.com> Message-Id: <1470035982-31658-2-git-send-email-raji@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH 1/5] target-ppc: add vector insert instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, benh@kernel.crashing.org, Rajalakshmi Srinivasaraghavan The following vector insert instructions are added from ISA 3.0. vinsertb - Vector Insert Byte vinserth - Vector Insert Halfword vinsertw - Vector Insert Word vinsertd - Vector Insert Doubleword Signed-off-by: Rajalakshmi Srinivasaraghavan --- target-ppc/helper.h | 4 ++++ target-ppc/int_helper.c | 21 +++++++++++++++++++++ target-ppc/translate/vmx-impl.c | 10 ++++++++++ target-ppc/translate/vmx-ops.c | 19 ++++++++++++++----- 4 files changed, 49 insertions(+), 5 deletions(-) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 93ac9e1..0923779 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -250,6 +250,10 @@ DEF_HELPER_2(vspltisw, void, avr, i32) DEF_HELPER_3(vspltb, void, avr, avr, i32) DEF_HELPER_3(vsplth, void, avr, avr, i32) DEF_HELPER_3(vspltw, void, avr, avr, i32) +DEF_HELPER_3(vinsertb, void, avr, avr, i32) +DEF_HELPER_3(vinserth, void, avr, avr, i32) +DEF_HELPER_3(vinsertw, void, avr, avr, i32) +DEF_HELPER_3(vinsertd, void, avr, avr, i32) DEF_HELPER_2(vupkhpx, void, avr, avr) DEF_HELPER_2(vupklpx, void, avr, avr) DEF_HELPER_2(vupkhsb, void, avr, avr) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index 552b2e0..637f0b1 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -1790,6 +1790,27 @@ VSPLT(b, u8) VSPLT(h, u16) VSPLT(w, u32) #undef VSPLT +#if defined(HOST_WORDS_BIGENDIAN) +#define VINSERT(suffix, element, index) \ + void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \ + { \ + memcpy(&r->u8[SPLAT_ELEMENT(u8)], &b->element[index], \ + sizeof(r->element[0])); \ + } +#else +#define VINSERT(suffix, element, index) \ + void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \ + { \ + memcpy(&r->u8[(16 - splat) - sizeof(r->element[0])], \ + &b->element[(ARRAY_SIZE(r->element) - index) - 1], \ + sizeof(r->element[0])); \ + } +#endif +VINSERT(b, u8, 7) +VINSERT(h, u16, 3) +VINSERT(w, u32, 1) +VINSERT(d, u64, 0) +#undef VINSERT #undef SPLAT_ELEMENT #undef _SPLAT_MASKED diff --git a/target-ppc/translate/vmx-impl.c b/target-ppc/translate/vmx-impl.c index ac78caf..4940ae3 100644 --- a/target-ppc/translate/vmx-impl.c +++ b/target-ppc/translate/vmx-impl.c @@ -626,10 +626,20 @@ static void glue(gen_, name)(DisasContext *ctx) \ GEN_VXFORM_UIMM(vspltb, 6, 8); GEN_VXFORM_UIMM(vsplth, 6, 9); GEN_VXFORM_UIMM(vspltw, 6, 10); +GEN_VXFORM_UIMM(vinsertb, 6, 12); +GEN_VXFORM_UIMM(vinserth, 6, 13); +GEN_VXFORM_UIMM(vinsertw, 6, 14); +GEN_VXFORM_UIMM(vinsertd, 6, 15); GEN_VXFORM_UIMM_ENV(vcfux, 5, 12); GEN_VXFORM_UIMM_ENV(vcfsx, 5, 13); GEN_VXFORM_UIMM_ENV(vctuxs, 5, 14); GEN_VXFORM_UIMM_ENV(vctsxs, 5, 15); +GEN_VXFORM_DUAL(vspltisb, PPC_NONE, PPC2_ALTIVEC_207, + vinsertb, PPC_NONE, PPC2_ISA300); +GEN_VXFORM_DUAL(vspltish, PPC_NONE, PPC2_ALTIVEC_207, + vinserth, PPC_NONE, PPC2_ISA300); +GEN_VXFORM_DUAL(vspltisw, PPC_NONE, PPC2_ALTIVEC_207, + vinsertw, PPC_NONE, PPC2_ISA300); static void gen_vsldoi(DisasContext *ctx) { diff --git a/target-ppc/translate/vmx-ops.c b/target-ppc/translate/vmx-ops.c index 7449396..a5534da 100644 --- a/target-ppc/translate/vmx-ops.c +++ b/target-ppc/translate/vmx-ops.c @@ -41,6 +41,9 @@ GEN_HANDLER_E(name, 0x04, opc2, opc3, 0x00000000, PPC_NONE, PPC2_ALTIVEC_207) #define GEN_VXFORM_300(name, opc2, opc3) \ GEN_HANDLER_E(name, 0x04, opc2, opc3, 0x00000000, PPC_NONE, PPC2_ISA300) +#define GEN_VXFORM_300_EXT(name, opc2, opc3, inval) \ +GEN_HANDLER_E(name, 0x04, opc2, opc3, inval, PPC_NONE, PPC2_ISA300) + #define GEN_VXFORM_DUAL(name0, name1, opc2, opc3, type0, type1) \ GEN_HANDLER_E(name0##_##name1, 0x4, opc2, opc3, 0x00000000, type0, type1) @@ -191,11 +194,17 @@ GEN_VXRFORM(vcmpgefp, 3, 7) GEN_VXRFORM_DUAL(vcmpgtfp, vcmpgtud, 3, 11, PPC_ALTIVEC, PPC_NONE) GEN_VXRFORM_DUAL(vcmpbfp, vcmpgtsd, 3, 15, PPC_ALTIVEC, PPC_NONE) -#define GEN_VXFORM_SIMM(name, opc2, opc3) \ - GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) -GEN_VXFORM_SIMM(vspltisb, 6, 12), -GEN_VXFORM_SIMM(vspltish, 6, 13), -GEN_VXFORM_SIMM(vspltisw, 6, 14), +#undef GEN_VXFORM_DUAL1 +#define GEN_VXFORM_DUAL1(name0, name1, opc2, opc3, inval0, inval1, type) \ +GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, \ + PPC_NONE) +GEN_VXFORM_DUAL1(vspltisb, vinsertb, 6, 12, 0x00000000, 0x100000, + PPC2_ALTIVEC_207), +GEN_VXFORM_DUAL1(vspltish, vinserth, 6, 13, 0x00000000, 0x100000, + PPC2_ALTIVEC_207), +GEN_VXFORM_DUAL1(vspltisw, vinsertw, 6, 14, 0x00000000, 0x100000, + PPC2_ALTIVEC_207), +GEN_VXFORM_300_EXT(vinsertd, 6, 15, 0x100000), #define GEN_VXFORM_NOA(name, opc2, opc3) \ GEN_HANDLER(name, 0x04, opc2, opc3, 0x001f0000, PPC_ALTIVEC) -- 1.7.1