From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754001AbcHRJAj (ORCPT ); Thu, 18 Aug 2016 05:00:39 -0400 Received: from regular1.263xmail.com ([211.150.99.137]:38860 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752435AbcHRI7Q (ORCPT ); Thu, 18 Aug 2016 04:59:16 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: finley.xiao@rock-chips.com X-FST-TO: srinivas.kandagatla@linaro.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: finley.xiao@rock-chips.com X-UNIQUE-TAG: <9720831b6024a05bb5fd53f50849cb34> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Finlye Xiao To: srinivas.kandagatla@linaro.org, maxime.ripard@free-electrons.com, heiko@sntech.de, robh+dt@kernel.org, frowand.list@gmail.com, sre@kernel.org, dbaryshkov@gmail.com, dwmw2@infradead.org, mark.rutland@arm.com, khilman@kernel.org, nm@ti.com, rjw@rjwysocki.net, viresh.kumar@linaro.org, sboyd@codeaurora.org Cc: linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, wxt@rock-chips.com, jay.xu@rock-chips.com, rocky.hao@rock-chips.com, tim.chen@rock-chips.com, tony.xie@rock-chips.com, ulysses.huang@rock-chips.com, lin.huang@rock-chips.com, Finley Xiao Subject: [PATCH v2 3/4] dt-bindings: add binding document for Rockchip cpu avs Date: Thu, 18 Aug 2016 16:52:20 +0800 Message-Id: <1471510341-63926-4-git-send-email-finley.xiao@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471510341-63926-1-git-send-email-finley.xiao@rock-chips.com> References: <1471510341-63926-1-git-send-email-finley.xiao@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Finley Xiao This patch documents the Rockchip cpu avs device tree binding. Signed-off-by: Finley Xiao --- .../devicetree/bindings/power/rockchip-cpu-avs.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt diff --git a/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt b/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt new file mode 100644 index 0000000..705f516 --- /dev/null +++ b/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt @@ -0,0 +1,37 @@ +Rockchip cpu avs device tree bindings +------------------------------------- + +Under the same frequency, the operating voltage tends to decrease with +increasing leakage. so it is necessary to adjust opp's voltage according +to leakage for power. + + +Required properties: +- compatible: Should be one of the following. + - "rockchip,rk3399-cpu-avs" - for RK3399 SoCs. +- leakage-volt-: Named leakage-volt property. At runtime, the + platform can find a cpu's cluster_id according to it's cpu_id and match + leakage-volt- property. The property is an array of 3-tuples + items, and each item consists of leakage and voltage like + . + min-leakage: minimum leakage in mA, ranges from 0 to 254. + max-leakage: maximum leakage in mA, ranges from 0 to 254. + volt: voltage offset in mV to apply to the opp table entries. + +Example: + + cpu_avs: cpu-avs { + compatible = "rockchip,rk3399-cpu-avs"; + leakage-volt-cluster0 = < + /* mA mA uV*/ + 0 100 0 + 101 200 (-25000) + 201 254 (-50000) + >; + leakage-volt-cluster1 = < + /* mA mA uV*/ + 0 100 0 + 101 200 (-25000) + 201 254 (-50000) + >; + }; -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Finlye Xiao Subject: [PATCH v2 3/4] dt-bindings: add binding document for Rockchip cpu avs Date: Thu, 18 Aug 2016 16:52:20 +0800 Message-ID: <1471510341-63926-4-git-send-email-finley.xiao@rock-chips.com> References: <1471510341-63926-1-git-send-email-finley.xiao@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1471510341-63926-1-git-send-email-finley.xiao@rock-chips.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: srinivas.kandagatla@linaro.org, maxime.ripard@free-electrons.com, heiko@sntech.de, robh+dt@kernel.org, frowand.list@gmail.com, sre@kernel.org, dbaryshkov@gmail.com, dwmw2@infradead.org, mark.rutland@arm.com, khilman@kernel.org, nm@ti.com, rjw@rjwysocki.net, viresh.kumar@linaro.org, sboyd@codeaurora.org Cc: devicetree@vger.kernel.org, tim.chen@rock-chips.com, linux-pm@vger.kernel.org, lin.huang@rock-chips.com, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, tony.xie@rock-chips.com, Finley Xiao , ulysses.huang@rock-chips.com, rocky.hao@rock-chips.com, jay.xu@rock-chips.com, linux-arm-kernel@lists.infradead.org, wxt@rock-chips.com List-Id: devicetree@vger.kernel.org From: Finley Xiao This patch documents the Rockchip cpu avs device tree binding. Signed-off-by: Finley Xiao --- .../devicetree/bindings/power/rockchip-cpu-avs.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt diff --git a/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt b/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt new file mode 100644 index 0000000..705f516 --- /dev/null +++ b/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt @@ -0,0 +1,37 @@ +Rockchip cpu avs device tree bindings +------------------------------------- + +Under the same frequency, the operating voltage tends to decrease with +increasing leakage. so it is necessary to adjust opp's voltage according +to leakage for power. + + +Required properties: +- compatible: Should be one of the following. + - "rockchip,rk3399-cpu-avs" - for RK3399 SoCs. +- leakage-volt-: Named leakage-volt property. At runtime, the + platform can find a cpu's cluster_id according to it's cpu_id and match + leakage-volt- property. The property is an array of 3-tuples + items, and each item consists of leakage and voltage like + . + min-leakage: minimum leakage in mA, ranges from 0 to 254. + max-leakage: maximum leakage in mA, ranges from 0 to 254. + volt: voltage offset in mV to apply to the opp table entries. + +Example: + + cpu_avs: cpu-avs { + compatible = "rockchip,rk3399-cpu-avs"; + leakage-volt-cluster0 = < + /* mA mA uV*/ + 0 100 0 + 101 200 (-25000) + 201 254 (-50000) + >; + leakage-volt-cluster1 = < + /* mA mA uV*/ + 0 100 0 + 101 200 (-25000) + 201 254 (-50000) + >; + }; -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: finley.xiao@rock-chips.com (Finlye Xiao) Date: Thu, 18 Aug 2016 16:52:20 +0800 Subject: [PATCH v2 3/4] dt-bindings: add binding document for Rockchip cpu avs In-Reply-To: <1471510341-63926-1-git-send-email-finley.xiao@rock-chips.com> References: <1471510341-63926-1-git-send-email-finley.xiao@rock-chips.com> Message-ID: <1471510341-63926-4-git-send-email-finley.xiao@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Finley Xiao This patch documents the Rockchip cpu avs device tree binding. Signed-off-by: Finley Xiao --- .../devicetree/bindings/power/rockchip-cpu-avs.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt diff --git a/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt b/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt new file mode 100644 index 0000000..705f516 --- /dev/null +++ b/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt @@ -0,0 +1,37 @@ +Rockchip cpu avs device tree bindings +------------------------------------- + +Under the same frequency, the operating voltage tends to decrease with +increasing leakage. so it is necessary to adjust opp's voltage according +to leakage for power. + + +Required properties: +- compatible: Should be one of the following. + - "rockchip,rk3399-cpu-avs" - for RK3399 SoCs. +- leakage-volt-: Named leakage-volt property. At runtime, the + platform can find a cpu's cluster_id according to it's cpu_id and match + leakage-volt- property. The property is an array of 3-tuples + items, and each item consists of leakage and voltage like + . + min-leakage: minimum leakage in mA, ranges from 0 to 254. + max-leakage: maximum leakage in mA, ranges from 0 to 254. + volt: voltage offset in mV to apply to the opp table entries. + +Example: + + cpu_avs: cpu-avs { + compatible = "rockchip,rk3399-cpu-avs"; + leakage-volt-cluster0 = < + /* mA mA uV*/ + 0 100 0 + 101 200 (-25000) + 201 254 (-50000) + >; + leakage-volt-cluster1 = < + /* mA mA uV*/ + 0 100 0 + 101 200 (-25000) + 201 254 (-50000) + >; + }; -- 1.9.1