From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 06/11] arm: socfpga: misc: Segregate the misc.c for Stratix 10
Date: Mon, 22 Aug 2016 23:02:38 +0800 [thread overview]
Message-ID: <1471878163-3598-7-git-send-email-clsee@altera.com> (raw)
In-Reply-To: <1471878163-3598-1-git-send-email-clsee@altera.com>
Segregate the misc.c to support both GEN5 SoC and Stratix 10 SoC.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Ley Foon Tan <lftan@altera.com>
---
arch/arm/mach-socfpga/misc.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 5cbd8a4..295121f 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -24,6 +24,8 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
+
static struct pl310_regs *const pl310 =
(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
static struct socfpga_system_manager *sysmgr_regs =
@@ -34,6 +36,7 @@ static struct nic301_registers *nic301_regs =
(struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS;
static struct scu_registers *scu_regs =
(struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS;
+#endif
int dram_init(void)
{
@@ -41,6 +44,7 @@ int dram_init(void)
return 0;
}
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
void enable_caches(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
@@ -246,6 +250,7 @@ static int socfpga_fpga_id(const bool print_id)
socfpga_fpga_model[i].name, version);
return i;
}
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
/*
* Print CPU information
@@ -253,14 +258,20 @@ static int socfpga_fpga_id(const bool print_id)
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
const u32 bsel = readl(&sysmgr_regs->bootinfo) & 0x7;
puts("CPU: Altera SoCFPGA Platform\n");
socfpga_fpga_id(1);
printf("BOOT: %s\n", bsel_str[bsel].name);
+#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
+ puts("CPU: Altera SoCFPGA Platform\n");
+ puts("FPGA: Altera Stratix 10\n");
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
return 0;
}
#endif
+#ifdef CONFIG_TARGET_SOCFPGA_GEN5
#ifdef CONFIG_ARCH_MISC_INIT
int arch_misc_init(void)
{
@@ -469,3 +480,4 @@ U_BOOT_CMD(
"bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
""
);
+#endif /* CONFIG_TARGET_SOCFPGA_GEN5 */
--
2.2.2
next prev parent reply other threads:[~2016-08-22 15:02 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-22 15:02 [U-Boot] [PATCH 00/11] Add support for Stratix 10 SoC Chin Liang See
2016-08-22 15:02 ` [U-Boot] [PATCH 01/11] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address Chin Liang See
2016-09-05 15:55 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 02/11] arm: socfpga: rstmgr: Add Reset Manager for Stratix 10 Chin Liang See
2016-09-05 15:56 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 03/11] arm: socfpga: rstmgr: Segregate the " Chin Liang See
2016-09-05 15:57 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 04/11] arm: socfpga: clkmgr: Segregate the Clock " Chin Liang See
2016-09-05 15:58 ` Marek Vasut
2016-09-06 5:14 ` Chin Liang See
2016-09-06 12:08 ` Marek Vasut
2016-09-07 13:26 ` Chin Liang See
2016-09-07 14:57 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 05/11] arm: socfpga: fpgamgr: Segregate the FPGA " Chin Liang See
2016-09-05 16:00 ` Marek Vasut
2016-09-06 5:44 ` Chin Liang See
2016-08-22 15:02 ` Chin Liang See [this message]
2016-09-05 16:01 ` [U-Boot] [PATCH 06/11] arm: socfpga: misc: Segregate the misc.c " Marek Vasut
2016-09-06 6:19 ` Chin Liang See
2016-09-06 12:09 ` Marek Vasut
2016-09-07 13:28 ` Chin Liang See
2016-09-07 14:57 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 07/11] arm: socfpga: sysmgr: Fix casting warning when enabling ARM64 Chin Liang See
2016-09-05 16:02 ` Marek Vasut
2016-09-06 9:41 ` Chin Liang See
2016-09-06 12:12 ` Marek Vasut
2016-09-07 13:31 ` Chin Liang See
2016-09-07 14:54 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 08/11] arm: socfpga: mmu: Add memory map layout for Stratix 10 SoC Chin Liang See
2016-08-22 15:02 ` [U-Boot] [PATCH 09/11] arm: socfpga: stratix10: Add board folder for Stratix 10 socdk Chin Liang See
2016-09-05 16:03 ` Marek Vasut
2016-09-06 6:29 ` Chin Liang See
2016-08-22 15:02 ` [U-Boot] [PATCH 10/11] arm: dts: socfpga: Add dts " Chin Liang See
2016-09-05 16:04 ` Marek Vasut
2016-08-22 15:02 ` [U-Boot] [PATCH 11/11] arm: socfpga: Add support for Stratix 10 SoC dev kit Chin Liang See
2016-09-05 16:06 ` Marek Vasut
2016-09-06 9:18 ` Chin Liang See
2016-09-06 12:15 ` Marek Vasut
2016-09-07 13:33 ` Chin Liang See
2016-09-07 14:54 ` Marek Vasut
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