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From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org,
	"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH V3] powerpc/mm: Add radix flush all with IS=3
Date: Tue, 23 Aug 2016 16:27:48 +0530	[thread overview]
Message-ID: <1471949868-542-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1471596759-3396-3-git-send-email-aneesh.kumar@linux.vnet.ibm.com>

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
 .../powerpc/include/asm/book3s/64/tlbflush-radix.h |  1 +
 arch/powerpc/mm/tlb-radix.c                        | 24 ++++++++++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
index 65037762b120..a9e19cb2f7c5 100644
--- a/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
+++ b/arch/powerpc/include/asm/book3s/64/tlbflush-radix.h
@@ -41,4 +41,5 @@ extern void radix__flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmad
 extern void radix__flush_tlb_lpid_va(unsigned long lpid, unsigned long gpa,
 				     unsigned long page_size);
 extern void radix__flush_tlb_lpid(unsigned long lpid);
+extern void radix__flush_tlb_all(void);
 #endif
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index 48df05ef5231..0e49ec541ab5 100644
--- a/arch/powerpc/mm/tlb-radix.c
+++ b/arch/powerpc/mm/tlb-radix.c
@@ -400,3 +400,27 @@ void radix__flush_pmd_tlb_range(struct vm_area_struct *vma,
 	radix__flush_tlb_range_psize(vma->vm_mm, start, end, MMU_PAGE_2M);
 }
 EXPORT_SYMBOL(radix__flush_pmd_tlb_range);
+
+void radix__flush_tlb_all(void)
+{
+	unsigned long rb,prs,r,rs;
+	unsigned long ric = RIC_FLUSH_ALL;
+
+	rb = 0x3 << PPC_BITLSHIFT(53); /* IS = 3 */
+	prs = 0; /* partition scoped */
+	r = 1;   /* raidx format */
+	rs = 1 & ((1UL << 32) - 1); /* any LPID value to flush guest mappings */
+
+	asm volatile("ptesync": : :"memory");
+	/*
+	 * now flush guest entries by passing PRS = 1 and LPID != 0
+	 */
+	asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
+		     : : "r"(rb), "i"(r), "i"(1), "i"(ric), "r"(rs) : "memory");
+	/*
+	 * now flush host entires by passing PRS = 0 and LPID == 0
+	 */
+	asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
+		     : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(0) : "memory");
+	asm volatile("eieio; tlbsync; ptesync": : :"memory");
+}
-- 
2.7.4

  parent reply	other threads:[~2016-08-23 10:58 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-19  8:52 [PATCH V2 0/5] kexec changes for Power ISA 3.0 Aneesh Kumar K.V
2016-08-19  8:52 ` [PATCH V2 1/5] powerpc/64/kexec: NULL check "clear_all" in kexec_sequence Aneesh Kumar K.V
2016-08-22  8:56   ` Balbir Singh
2016-09-25  3:00   ` [V2, " Michael Ellerman
2016-08-19  8:52 ` [PATCH V2 2/5] powerpc/mm: Add radix flush all with IS=3 Aneesh Kumar K.V
2016-08-21 23:55   ` Benjamin Herrenschmidt
2016-08-22  6:11     ` Aneesh Kumar K.V
2016-08-22 18:22       ` Balbir Singh
2016-08-23 10:57   ` Aneesh Kumar K.V [this message]
2016-08-24  5:19     ` [PATCH V3] " Balbir Singh
2016-09-25  3:00     ` [V3] " Michael Ellerman
2016-08-19  8:52 ` [PATCH V2 3/5] powerpc/64/kexec: Fix MMU cleanup on radix Aneesh Kumar K.V
2016-08-23  0:02   ` Balbir Singh
2016-08-19  8:52 ` [PATCH V2 4/5] powerpc/64/kexec: Copy image with MMU off when possible Aneesh Kumar K.V
2016-08-23  0:21   ` Balbir Singh
2016-08-19  8:52 ` [PATCH V2 5/5] powerpc/64/kexec: Remove BookE special default_machine_kexec_prepare() Aneesh Kumar K.V

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