From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51487) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bgHjq-000809-2i for qemu-devel@nongnu.org; Sat, 03 Sep 2016 16:40:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bgHjo-00033S-Qp for qemu-devel@nongnu.org; Sat, 03 Sep 2016 16:40:30 -0400 Received: from mail-pa0-x22f.google.com ([2607:f8b0:400e:c03::22f]:35810) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bgHjo-00033M-Jj for qemu-devel@nongnu.org; Sat, 03 Sep 2016 16:40:28 -0400 Received: by mail-pa0-x22f.google.com with SMTP id hb8so50259323pac.2 for ; Sat, 03 Sep 2016 13:40:28 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sat, 3 Sep 2016 13:39:51 -0700 Message-Id: <1472935202-3342-24-git-send-email-rth@twiddle.net> In-Reply-To: <1472935202-3342-1-git-send-email-rth@twiddle.net> References: <1472935202-3342-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v3 23/34] target-i386: emulate XCHG using atomic helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Emilio G. Cota" From: "Emilio G. Cota" Signed-off-by: Emilio G. Cota Message-Id: <1467054136-10430-19-git-send-email-cota@braap.org> Signed-off-by: Richard Henderson --- target-i386/translate.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 2e7cefe..b8c5dde 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -5564,12 +5564,8 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_lea_modrm(env, s, modrm); gen_op_mov_v_reg(ot, cpu_T0, reg); /* for xchg, lock is implicit */ - if (!(prefixes & PREFIX_LOCK)) - gen_helper_lock(); - gen_op_ld_v(s, ot, cpu_T1, cpu_A0); - gen_op_st_v(s, ot, cpu_T0, cpu_A0); - if (!(prefixes & PREFIX_LOCK)) - gen_helper_unlock(); + tcg_gen_atomic_xchg_tl(cpu_T1, cpu_A0, cpu_T0, + s->mem_index, ot | MO_LE); gen_op_mov_reg_v(ot, reg, cpu_T1); } break; -- 2.7.4