From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48326) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bh7EA-0000wV-No for qemu-devel@nongnu.org; Mon, 05 Sep 2016 23:39:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bh7E4-00078C-0l for qemu-devel@nongnu.org; Mon, 05 Sep 2016 23:39:13 -0400 From: David Gibson Date: Tue, 6 Sep 2016 13:40:39 +1000 Message-Id: <1473133253-17598-53-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1473133253-17598-1-git-send-email-david@gibson.dropbear.id.au> References: <1473133253-17598-1-git-send-email-david@gibson.dropbear.id.au> Subject: [Qemu-devel] [PULL 52/66] target-ppc: add vsrv instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linearo.org Cc: agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Vivek Andrew Sha , Nikunj A Dadhania , David Gibson From: Vivek Andrew Sha Adds Vector Shift Right Variable instruction. Signed-off-by: Vivek Andrew Sha [ reverse the order of computation to avoid temporary array ] Signed-off-by: Nikunj A Dadhania Reviewed-by: Richard Henderson Signed-off-by: David Gibson --- target-ppc/helper.h | 1 + target-ppc/int_helper.c | 17 +++++++++++++++++ target-ppc/translate/vmx-impl.c | 1 + target-ppc/translate/vmx-ops.c | 1 + 4 files changed, 20 insertions(+) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 9703f85..8eada2f 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -211,6 +211,7 @@ DEF_HELPER_3(vslw, void, avr, avr, avr) DEF_HELPER_3(vsld, void, avr, avr, avr) DEF_HELPER_3(vslo, void, avr, avr, avr) DEF_HELPER_3(vsro, void, avr, avr, avr) +DEF_HELPER_3(vsrv, void, avr, avr, avr) DEF_HELPER_3(vslv, void, avr, avr, avr) DEF_HELPER_3(vaddcuw, void, avr, avr, avr) DEF_HELPER_3(vsubcuw, void, avr, avr, avr) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index 12fe144..552b2e0 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -1710,6 +1710,23 @@ void helper_vslv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } +void helper_vsrv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +{ + int i; + unsigned int shift, bytes; + + /* Use reverse order, as destination and source register can be same. Its + * being modified in place saving temporary, reverse order will guarantee + * that computed result is not fed back. + */ + for (i = ARRAY_SIZE(r->u8) - 1; i >= 0; i--) { + shift = b->u8[i] & 0x7; /* extract shift value */ + bytes = ((i ? a->u8[i - 1] : 0) << 8) + a->u8[i]; + /* extract adjacent bytes */ + r->u8[i] = (bytes >> shift) & 0xFF; /* shift and store result */ + } +} + void helper_vsldoi(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) { int sh = shift & 0xf; diff --git a/target-ppc/translate/vmx-impl.c b/target-ppc/translate/vmx-impl.c index e979668..b984122 100644 --- a/target-ppc/translate/vmx-impl.c +++ b/target-ppc/translate/vmx-impl.c @@ -383,6 +383,7 @@ GEN_VXFORM(vsrab, 2, 12); GEN_VXFORM(vsrah, 2, 13); GEN_VXFORM(vsraw, 2, 14); GEN_VXFORM(vsrad, 2, 15); +GEN_VXFORM(vsrv, 2, 28); GEN_VXFORM(vslv, 2, 29); GEN_VXFORM(vslo, 6, 16); GEN_VXFORM(vsro, 6, 17); diff --git a/target-ppc/translate/vmx-ops.c b/target-ppc/translate/vmx-ops.c index 61e08b2..2a9f225 100644 --- a/target-ppc/translate/vmx-ops.c +++ b/target-ppc/translate/vmx-ops.c @@ -110,6 +110,7 @@ GEN_VXFORM(vsrab, 2, 12), GEN_VXFORM(vsrah, 2, 13), GEN_VXFORM(vsraw, 2, 14), GEN_VXFORM_207(vsrad, 2, 15), +GEN_VXFORM_300(vsrv, 2, 28), GEN_VXFORM_300(vslv, 2, 29), GEN_VXFORM(vslo, 6, 16), GEN_VXFORM(vsro, 6, 17), -- 2.7.4