From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33553) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bha5h-0002h2-G7 for qemu-devel@nongnu.org; Wed, 07 Sep 2016 06:28:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bha5c-0004h2-BJ for qemu-devel@nongnu.org; Wed, 07 Sep 2016 06:28:25 -0400 From: David Gibson Date: Wed, 7 Sep 2016 20:29:22 +1000 Message-Id: <1473244183-31510-44-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1473244183-31510-1-git-send-email-david@gibson.dropbear.id.au> References: <1473244183-31510-1-git-send-email-david@gibson.dropbear.id.au> Subject: [Qemu-devel] [PULL 43/64] ppc: load/store multiple and string insns don't do LE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org Cc: agraf@suse.de, thuth@redhat.com, lvivier@redhat.com, benh@kernel.crashing.org, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, David Gibson From: Benjamin Herrenschmidt Just generate an alignment interrupt Signed-off-by: Benjamin Herrenschmidt Signed-off-by: David Gibson --- target-ppc/translate.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 1315656..379d3d4 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -2889,6 +2889,11 @@ static void gen_lmw(DisasContext *ctx) { TCGv t0; TCGv_i32 t1; + + if (ctx->le_mode) { + gen_align_no_le(ctx); + return; + } gen_set_access_type(ctx, ACCESS_INT); t0 = tcg_temp_new(); t1 = tcg_const_i32(rD(ctx->opcode)); @@ -2903,6 +2908,11 @@ static void gen_stmw(DisasContext *ctx) { TCGv t0; TCGv_i32 t1; + + if (ctx->le_mode) { + gen_align_no_le(ctx); + return; + } gen_set_access_type(ctx, ACCESS_INT); t0 = tcg_temp_new(); t1 = tcg_const_i32(rS(ctx->opcode)); @@ -2929,6 +2939,10 @@ static void gen_lswi(DisasContext *ctx) int ra = rA(ctx->opcode); int nr; + if (ctx->le_mode) { + gen_align_no_le(ctx); + return; + } if (nb == 0) nb = 32; nr = (nb + 3) / 4; @@ -2952,6 +2966,11 @@ static void gen_lswx(DisasContext *ctx) { TCGv t0; TCGv_i32 t1, t2, t3; + + if (ctx->le_mode) { + gen_align_no_le(ctx); + return; + } gen_set_access_type(ctx, ACCESS_INT); t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); @@ -2971,6 +2990,11 @@ static void gen_stswi(DisasContext *ctx) TCGv t0; TCGv_i32 t1, t2; int nb = NB(ctx->opcode); + + if (ctx->le_mode) { + gen_align_no_le(ctx); + return; + } gen_set_access_type(ctx, ACCESS_INT); t0 = tcg_temp_new(); gen_addr_register(ctx, t0); @@ -2989,6 +3013,11 @@ static void gen_stswx(DisasContext *ctx) { TCGv t0; TCGv_i32 t1, t2; + + if (ctx->le_mode) { + gen_align_no_le(ctx); + return; + } gen_set_access_type(ctx, ACCESS_INT); t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); -- 2.7.4