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From: Lyude <cpaul@redhat.com>
To: Paulo Zanoni <paulo.r.zanoni@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/8] drm/i915: SAGV is not SKL-only, so rename a few things
Date: Wed, 07 Sep 2016 12:05:22 -0400	[thread overview]
Message-ID: <1473264322.22966.2.camel@redhat.com> (raw)
In-Reply-To: <1473209539-6689-2-git-send-email-paulo.r.zanoni@intel.com>

My only thought is that it seems like we prefix functions skl_, kbl_,
etc. just to indicate which generation introduced the feature. Skl uses
quite a few sandybridge and haswell functions. If this is a little
closer to what most intel devs would expect the naming to be though
then:

Reviewed-by: Lyude <cpaul@redhat.com>

going through the other patches now as well

On Tue, 2016-09-06 at 21:52 -0300, Paulo Zanoni wrote:
> The plan is to introduce intel_has_sagv() and then use it to discover
> which platforms actually support it.
> 
> I thought about keeping the functions with their current skl names,
> but found two problems: (i) skl_has_sagv() would become a very
> confusing name, and (ii) intel_atomic_commit_tail() doesn't seem to
> be
> calling any functions whose name start with a platform name, so the
> "intel_" naming scheme seems make more sense than the "firstplatorm_"
> naming scheme here.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h      | 10 +++++-----
>  drivers/gpu/drm/i915/intel_display.c |  8 ++++----
>  drivers/gpu/drm/i915/intel_drv.h     |  6 +++---
>  drivers/gpu/drm/i915/intel_pm.c      | 26 +++++++++++++-------------
>  4 files changed, 25 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 053a347..503c69d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1972,11 +1972,11 @@ struct drm_i915_private {
>  	struct vlv_s0ix_state vlv_s0ix_state;
>  
>  	enum {
> -		I915_SKL_SAGV_UNKNOWN = 0,
> -		I915_SKL_SAGV_DISABLED,
> -		I915_SKL_SAGV_ENABLED,
> -		I915_SKL_SAGV_NOT_CONTROLLED
> -	} skl_sagv_status;
> +		I915_SAGV_UNKNOWN = 0,
> +		I915_SAGV_DISABLED,
> +		I915_SAGV_ENABLED,
> +		I915_SAGV_NOT_CONTROLLED
> +	} sagv_status;
>  
>  	struct {
>  		/*
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 6b4d7ac..4dd4961 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14379,8 +14379,8 @@ static void intel_atomic_commit_tail(struct
> drm_atomic_state *state)
>  		 * SKL workaround: bspec recommends we disable the
> SAGV when we
>  		 * have more then one pipe enabled
>  		 */
> -		if (IS_SKYLAKE(dev_priv) &&
> !skl_can_enable_sagv(state))
> -			skl_disable_sagv(dev_priv);
> +		if (IS_SKYLAKE(dev_priv) &&
> !intel_can_enable_sagv(state))
> +			intel_disable_sagv(dev_priv);
>  
>  		intel_modeset_verify_disabled(dev);
>  	}
> @@ -14438,8 +14438,8 @@ static void intel_atomic_commit_tail(struct
> drm_atomic_state *state)
>  	}
>  
>  	if (IS_SKYLAKE(dev_priv) && intel_state->modeset &&
> -	    skl_can_enable_sagv(state))
> -		skl_enable_sagv(dev_priv);
> +	    intel_can_enable_sagv(state))
> +		intel_enable_sagv(dev_priv);
>  
>  	drm_atomic_helper_commit_hw_done(state);
>  
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index d084c1b..bb55b61 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1741,9 +1741,9 @@ void ilk_wm_get_hw_state(struct drm_device
> *dev);
>  void skl_wm_get_hw_state(struct drm_device *dev);
>  void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
>  			  struct skl_ddb_allocation *ddb /* out */);
> -bool skl_can_enable_sagv(struct drm_atomic_state *state);
> -int skl_enable_sagv(struct drm_i915_private *dev_priv);
> -int skl_disable_sagv(struct drm_i915_private *dev_priv);
> +bool intel_can_enable_sagv(struct drm_atomic_state *state);
> +int intel_enable_sagv(struct drm_i915_private *dev_priv);
> +int intel_disable_sagv(struct drm_i915_private *dev_priv);
>  bool skl_ddb_allocation_equals(const struct skl_ddb_allocation *old,
>  			       const struct skl_ddb_allocation *new,
>  			       enum pipe pipe);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 4f833a0..32588e3 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2896,12 +2896,12 @@ skl_wm_plane_id(const struct intel_plane
> *plane)
>   *  - We're not using an interlaced display configuration
>   */
>  int
> -skl_enable_sagv(struct drm_i915_private *dev_priv)
> +intel_enable_sagv(struct drm_i915_private *dev_priv)
>  {
>  	int ret;
>  
> -	if (dev_priv->skl_sagv_status ==
> I915_SKL_SAGV_NOT_CONTROLLED ||
> -	    dev_priv->skl_sagv_status == I915_SKL_SAGV_ENABLED)
> +	if (dev_priv->sagv_status == I915_SAGV_NOT_CONTROLLED ||
> +	    dev_priv->sagv_status == I915_SAGV_ENABLED)
>  		return 0;
>  
>  	DRM_DEBUG_KMS("Enabling the SAGV\n");
> @@ -2919,19 +2919,19 @@ skl_enable_sagv(struct drm_i915_private
> *dev_priv)
>  	 */
>  	if (ret == -ENXIO) {
>  		DRM_DEBUG_DRIVER("No SAGV found on system,
> ignoring\n");
> -		dev_priv->skl_sagv_status =
> I915_SKL_SAGV_NOT_CONTROLLED;
> +		dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
>  		return 0;
>  	} else if (ret < 0) {
>  		DRM_ERROR("Failed to enable the SAGV\n");
>  		return ret;
>  	}
>  
> -	dev_priv->skl_sagv_status = I915_SKL_SAGV_ENABLED;
> +	dev_priv->sagv_status = I915_SAGV_ENABLED;
>  	return 0;
>  }
>  
>  static int
> -skl_do_sagv_disable(struct drm_i915_private *dev_priv)
> +intel_do_sagv_disable(struct drm_i915_private *dev_priv)
>  {
>  	int ret;
>  	uint32_t temp = GEN9_SAGV_DISABLE;
> @@ -2945,19 +2945,19 @@ skl_do_sagv_disable(struct drm_i915_private
> *dev_priv)
>  }
>  
>  int
> -skl_disable_sagv(struct drm_i915_private *dev_priv)
> +intel_disable_sagv(struct drm_i915_private *dev_priv)
>  {
>  	int ret, result;
>  
> -	if (dev_priv->skl_sagv_status ==
> I915_SKL_SAGV_NOT_CONTROLLED ||
> -	    dev_priv->skl_sagv_status == I915_SKL_SAGV_DISABLED)
> +	if (dev_priv->sagv_status == I915_SAGV_NOT_CONTROLLED ||
> +	    dev_priv->sagv_status == I915_SAGV_DISABLED)
>  		return 0;
>  
>  	DRM_DEBUG_KMS("Disabling the SAGV\n");
>  	mutex_lock(&dev_priv->rps.hw_lock);
>  
>  	/* bspec says to keep retrying for at least 1 ms */
> -	ret = wait_for(result = skl_do_sagv_disable(dev_priv), 1);
> +	ret = wait_for(result = intel_do_sagv_disable(dev_priv), 1);
>  	mutex_unlock(&dev_priv->rps.hw_lock);
>  
>  	if (ret == -ETIMEDOUT) {
> @@ -2971,18 +2971,18 @@ skl_disable_sagv(struct drm_i915_private
> *dev_priv)
>  	 */
>  	if (result == -ENXIO) {
>  		DRM_DEBUG_DRIVER("No SAGV found on system,
> ignoring\n");
> -		dev_priv->skl_sagv_status =
> I915_SKL_SAGV_NOT_CONTROLLED;
> +		dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
>  		return 0;
>  	} else if (result < 0) {
>  		DRM_ERROR("Failed to disable the SAGV\n");
>  		return result;
>  	}
>  
> -	dev_priv->skl_sagv_status = I915_SKL_SAGV_DISABLED;
> +	dev_priv->sagv_status = I915_SAGV_DISABLED;
>  	return 0;
>  }
>  
> -bool skl_can_enable_sagv(struct drm_atomic_state *state)
> +bool intel_can_enable_sagv(struct drm_atomic_state *state)
>  {
>  	struct drm_device *dev = state->dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
-- 
Cheers,
	Lyude
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Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-09-07 16:05 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-07  0:52 [PATCH 0/8] SKL/KBL watermark fixes Paulo Zanoni
2016-09-07  0:52 ` [PATCH 1/8] drm/i915: SAGV is not SKL-only, so rename a few things Paulo Zanoni
2016-09-07 16:05   ` Lyude [this message]
2016-09-09 20:16     ` Zanoni, Paulo R
2016-09-07  0:52 ` [PATCH 2/8] drm/i915: introduce intel_has_sagv() Paulo Zanoni
2016-09-07 16:12   ` Lyude
2016-09-08  8:59     ` Jani Nikula
2016-09-08 14:43       ` Lyude Paul
2016-09-09  8:06         ` Jani Nikula
2016-09-09 19:51           ` Zanoni, Paulo R
2016-09-10 10:49             ` Ville Syrjälä
2016-09-12  9:48               ` Jani Nikula
2016-09-07  0:52 ` [PATCH 3/8] drm/i915/kbl: KBL also needs to run the SAGV code Paulo Zanoni
2016-09-07 16:11   ` Ville Syrjälä
2016-09-07 16:17     ` Lyude
2016-09-13 19:34       ` Zanoni, Paulo R
2016-09-14  9:59         ` Jani Nikula
2016-09-14 13:32           ` Zanoni, Paulo R
2016-09-15  7:15             ` Jani Nikula
2016-09-07  0:52 ` [PATCH 4/8] drm/i915/gen9: fix the WaWmMemoryReadLatency implementation Paulo Zanoni
2016-09-13 12:28   ` Maarten Lankhorst
2016-09-07  0:52 ` [PATCH 5/8] drm/i915/gen9: minimum scanlines for Y tile is not always 4 Paulo Zanoni
2016-09-07 23:03   ` Lyude
2016-09-13 20:22     ` Zanoni, Paulo R
2016-09-07  0:52 ` [PATCH 6/8] drm/i915/gen9: fix plane_blocks_per_line on watermarks calculations Paulo Zanoni
2016-09-07  0:52 ` [PATCH 7/8] drm/i915/gen9: fix the watermark res_blocks value Paulo Zanoni
2016-09-07  0:52 ` [PATCH 8/8] drm/i915/gen9: implement missing case for SKL watermarks calculation Paulo Zanoni
2016-09-07  1:24 ` ✗ Fi.CI.BAT: warning for SKL/KBL watermark fixes Patchwork
2016-09-07 23:54 ` [PATCH 0/8] " Lyude

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