From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44586) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bi7sG-00037b-7H for qemu-devel@nongnu.org; Thu, 08 Sep 2016 18:32:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bi7sD-0000gv-1x for qemu-devel@nongnu.org; Thu, 08 Sep 2016 18:32:48 -0400 Received: from mail-wm0-x242.google.com ([2a00:1450:400c:c09::242]:34874) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bi7sC-0000gp-OS for qemu-devel@nongnu.org; Thu, 08 Sep 2016 18:32:44 -0400 Received: by mail-wm0-x242.google.com with SMTP id a6so200642wmc.2 for ; Thu, 08 Sep 2016 15:32:44 -0700 (PDT) From: Michael Rolnik Date: Fri, 9 Sep 2016 01:31:47 +0300 Message-Id: <1473373930-31547-7-git-send-email-mrolnik@gmail.com> In-Reply-To: <1473373930-31547-1-git-send-email-mrolnik@gmail.com> References: <1473373930-31547-1-git-send-email-mrolnik@gmail.com> Subject: [Qemu-devel] [PATCH RFC v1 06/29] target-arc: EX, LD, ST, SYNC, PREFETCH List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Michael Rolnik Signed-off-by: Michael Rolnik --- target-arc/translate-inst.c | 230 ++++++++++++++++++++++++++++++++++++++++++++ target-arc/translate-inst.h | 10 ++ 2 files changed, 240 insertions(+) diff --git a/target-arc/translate-inst.c b/target-arc/translate-inst.c index 2032823..ac13c86 100644 --- a/target-arc/translate-inst.c +++ b/target-arc/translate-inst.c @@ -664,3 +664,233 @@ int arc_gen_RORm(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2) return BS_NONE; } +/* + EX +*/ +int arc_gen_EX(DisasCtxt *ctx, TCGv dest, TCGv src1) +{ + TCGv temp = tcg_temp_new_i32(); + + tcg_gen_mov_tl(temp, dest); + + tcg_gen_qemu_ld_tl(dest, src1, ctx->memidx, MO_UL); + tcg_gen_qemu_st_tl(temp, src1, ctx->memidx, MO_UL); + + tcg_temp_free_i32(temp); + + return BS_NONE; +} + +/* + LD +*/ +int arc_gen_LD(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2) +{ + TCGv addr = tcg_temp_new_i32(); + + /* address */ + switch (ctx->opt.aa) { + case 0x00: { + tcg_gen_add_tl(addr, src1, src2); + } break; + + case 0x01: { + tcg_gen_add_tl(addr, src1, src2); + } break; + + case 0x02: { + tcg_gen_mov_tl(addr, src1); + } break; + + case 0x03: { + if (ctx->opt.zz == 0x02) { + tcg_gen_shli_tl(addr, src2, 1); + } else if (ctx->opt.zz == 0x00) { + tcg_gen_shli_tl(addr, src2, 2); + } else { + assert(!"bad format"); + } + + tcg_gen_add_tl(addr, src1, addr); + } break; + } + + /* memory read */ + switch (ctx->opt.zz) { + case 0x00: { + tcg_gen_qemu_ld_tl(dest, addr, ctx->memidx, MO_UL); + } break; + + case 0x01: { + if (ctx->opt.x) { + tcg_gen_qemu_ld_tl(dest, addr, ctx->memidx, MO_SB); + } else { + tcg_gen_qemu_ld_tl(dest, addr, ctx->memidx, MO_UB); + } + } break; + + case 0x02: { + if (ctx->opt.x) { + tcg_gen_qemu_ld_tl(dest, addr, ctx->memidx, MO_SW); + } else { + tcg_gen_qemu_ld_tl(dest, addr, ctx->memidx, MO_UW); + } + } break; + + case 0x03: { + assert(!"reserved"); + } break; + } + + /* address write back */ + if (ctx->opt.aa == 0x01 || ctx->opt.aa == 0x02) { + tcg_gen_add_tl(src1, src1, src2); + } + + tcg_temp_free_i32(addr); + + return BS_NONE; +} + +/* + LDB +*/ +int arc_gen_LDB(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2) +{ + + ctx->opt.zz = 1; /* byte */ + ctx->opt.x = 0; /* no sign extension */ + ctx->opt.aa = 0; /* no address write back */ + ctx->opt.di = 0; /* cached data memory access */ + + return arc_gen_LD(ctx, dest, src1, src2); +} + +/* + LDW +*/ +int arc_gen_LDW(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2) +{ + + ctx->opt.zz = 2; /* word */ + ctx->opt.x = 0; /* no sign extension */ + ctx->opt.aa = 0; /* no address write back */ + ctx->opt.di = 0; /* cached data memory access */ + + return arc_gen_LD(ctx, dest, src1, src2); +} + +/* + ST +*/ +int arc_gen_ST(DisasCtxt *ctx, TCGv src1, TCGv src2, TCGv src3) +{ + TCGv addr = tcg_temp_new_i32(); + + /* address */ + switch (ctx->opt.aa) { + case 0x00: { + tcg_gen_add_tl(addr, src2, src3); + } break; + + case 0x01: { + tcg_gen_add_tl(addr, src2, src3); + } break; + + case 0x02: { + tcg_gen_mov_tl(addr, src2); + } break; + + case 0x03: { + if (ctx->opt.zz == 0x02) { + tcg_gen_shli_tl(addr, src3, 1); + } else if (ctx->opt.zz == 0x00) { + tcg_gen_shli_tl(addr, src3, 2); + } else { + assert(!"bad format"); + } + + tcg_gen_add_tl(addr, src2, addr); + } break; + } + + /* write */ + switch (ctx->opt.zz) { + case 0x00: { + tcg_gen_qemu_st_tl(src1, addr, ctx->memidx, MO_UL); + } break; + + case 0x01: { + tcg_gen_qemu_st_tl(src1, addr, ctx->memidx, MO_UB); + } break; + + case 0x02: { + tcg_gen_qemu_st_tl(src1, addr, ctx->memidx, MO_UW); + } break; + + case 0x03: { + assert(!"reserved"); + } break; + } + + /* address write back */ + if (ctx->opt.aa == 0x01 || ctx->opt.aa == 0x02) { + tcg_gen_add_tl(src2, src2, src3); + } + + tcg_temp_free_i32(addr); + + return BS_NONE; +} + +/* + STB +*/ +int arc_gen_STB(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2) +{ + + ctx->opt.zz = 1; /* byte */ + ctx->opt.x = 0; /* no sign extension */ + ctx->opt.aa = 0; /* no address write back */ + ctx->opt.di = 0; /* cached data memory access */ + + return arc_gen_ST(ctx, dest, src1, src2); +} + +/* + STW +*/ +int arc_gen_STW(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2) +{ + + ctx->opt.zz = 2; /* word */ + ctx->opt.x = 0; /* no sign extension */ + ctx->opt.aa = 0; /* no address write back */ + ctx->opt.di = 0; /* cached data memory access */ + + return arc_gen_ST(ctx, dest, src1, src2); +} + +/* + PREFETCH +*/ +int arc_gen_PREFETCH(DisasCtxt *ctx, TCGv src1, TCGv src2) +{ + TCGv temp = tcg_temp_new_i32(); + + arc_gen_LD(ctx, temp, src1, src2); + + tcg_temp_free_i32(temp); + + return BS_NONE; +} + +/* + SYNC +*/ +int arc_gen_SYNC(DisasCtxt *ctx) +{ + /* nothing to do*/ + + return BS_NONE; +} diff --git a/target-arc/translate-inst.h b/target-arc/translate-inst.h index 325f708..0038645 100644 --- a/target-arc/translate-inst.h +++ b/target-arc/translate-inst.h @@ -51,3 +51,13 @@ int arc_gen_LSRm(DisasCtxt *c, TCGv dest, TCGv src1, TCGv src2); int arc_gen_ROR(DisasCtxt *c, TCGv dest, TCGv src1); int arc_gen_RORm(DisasCtxt *c, TCGv dest, TCGv src1, TCGv src2); +int arc_gen_EX(DisasCtxt *c, TCGv dest, TCGv src1); +int arc_gen_LD(DisasCtxt *c, TCGv dest, TCGv src1, TCGv src2); +int arc_gen_LDW(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2); +int arc_gen_LDB(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2); +int arc_gen_ST(DisasCtxt *c, TCGv src1, TCGv src2, TCGv src3); +int arc_gen_STW(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2); +int arc_gen_STB(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2); +int arc_gen_PREFETCH(DisasCtxt *c, TCGv src1, TCGv src2); +int arc_gen_SYNC(DisasCtxt *c); + -- 2.4.9 (Apple Git-60)