From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757665AbcILKQt (ORCPT ); Mon, 12 Sep 2016 06:16:49 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:17763 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1755803AbcILKQr (ORCPT ); Mon, 12 Sep 2016 06:16:47 -0400 Message-ID: <1473675402.12398.28.camel@mtksdaap41> Subject: Re: [PATCH v7 4/9] drm/mediatek: update display module connections From: YT Shen To: CK Hu CC: , Philipp Zabel , David Airlie , Matthias Brugger , Daniel Kurtz , Mao Huang , Bibby Hsieh , "Daniel Vetter" , Thierry Reding , Jie Qiu , Maxime Ripard , Chris Wilson , shaoming chen , Jitao Shi , Boris Brezillon , Dan Carpenter , , , , , Sascha Hauer , , Date: Mon, 12 Sep 2016 18:16:42 +0800 In-Reply-To: <1473147546.11736.7.camel@mtksdaap41> References: <1472815484-43821-1-git-send-email-yt.shen@mediatek.com> <1472815484-43821-5-git-send-email-yt.shen@mediatek.com> <1473147546.11736.7.camel@mtksdaap41> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi CK, On Tue, 2016-09-06 at 15:39 +0800, CK Hu wrote: > Hi, YT: > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > > update connections for OVL, RDMA, BLS, DSI > > > > Signed-off-by: YT Shen > > --- > > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 25 +++++++++++++++++++++++++ > > 1 file changed, 25 insertions(+) > > > > [snip...] > > > @@ -111,6 +119,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, > > if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_COLOR0) { > > *addr = DISP_REG_CONFIG_DISP_OVL0_MOUT_EN; > > value = OVL0_MOUT_EN_COLOR0; > > + } else if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_RDMA0) { > > + *addr = DISP_REG_CONFIG_DISP_OVL_MOUT_EN; > > + value = OVL_MOUT_EN_RDMA; > > } else if (cur == DDP_COMPONENT_OD && next == DDP_COMPONENT_RDMA0) { > > *addr = DISP_REG_CONFIG_DISP_OD_MOUT_EN; > > value = OD_MOUT_EN_RDMA0; > > @@ -148,6 +159,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, > > } else if (cur == DDP_COMPONENT_OVL1 && next == DDP_COMPONENT_COLOR1) { > > *addr = DISP_REG_CONFIG_DISP_COLOR1_SEL_IN; > > value = COLOR1_SEL_IN_OVL1; > > + } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) { > > DDP_COMPONENT_BLS is a new symbol which is defined in 9th patch of this > series. I think the definition of DDP_COMPONENT_BLS should be in front > of this patch. OK, we will move the definition to this patch. Regards, yt.shen > > > + *addr = DISP_REG_CONFIG_DSI_SEL; > > + value = DSI_SEL_IN_BLS; > > } else { > > value = 0; > > } > > @@ -155,6 +169,15 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, > > return value; > > } > > > > Regards, > CK > > From mboxrd@z Thu Jan 1 00:00:00 1970 From: YT Shen Subject: Re: [PATCH v7 4/9] drm/mediatek: update display module connections Date: Mon, 12 Sep 2016 18:16:42 +0800 Message-ID: <1473675402.12398.28.camel@mtksdaap41> References: <1472815484-43821-1-git-send-email-yt.shen@mediatek.com> <1472815484-43821-5-git-send-email-yt.shen@mediatek.com> <1473147546.11736.7.camel@mtksdaap41> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1473147546.11736.7.camel@mtksdaap41> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: CK Hu Cc: Daniel Vetter , Jie Qiu , Mao Huang , yingjoe.chen@mediatek.com, Dan Carpenter , Jitao Shi , Sascha Hauer , linux-mediatek@lists.infradead.org, dri-devel@lists.freedesktop.org, Matthias Brugger , shaoming chen , linux-arm-kernel@lists.infradead.org, srv_heupstream@mediatek.com, emil.l.velikov@gmail.com, linux-kernel@vger.kernel.org, Maxime Ripard List-Id: linux-mediatek@lists.infradead.org SGkgQ0ssCgpPbiBUdWUsIDIwMTYtMDktMDYgYXQgMTU6MzkgKzA4MDAsIENLIEh1IHdyb3RlOgo+ IEhpLCBZVDoKPiAKPiBPbiBGcmksIDIwMTYtMDktMDIgYXQgMTk6MjQgKzA4MDAsIFlUIFNoZW4g d3JvdGU6Cj4gPiB1cGRhdGUgY29ubmVjdGlvbnMgZm9yIE9WTCwgUkRNQSwgQkxTLCBEU0kKPiA+ IAo+ID4gU2lnbmVkLW9mZi1ieTogWVQgU2hlbiA8eXQuc2hlbkBtZWRpYXRlay5jb20+Cj4gPiAt LS0KPiA+ICBkcml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2RybV9kZHAuYyB8IDI1ICsrKysr KysrKysrKysrKysrKysrKysrKysKPiA+ICAxIGZpbGUgY2hhbmdlZCwgMjUgaW5zZXJ0aW9ucygr KQo+ID4gCj4gCj4gW3NuaXAuLi5dCj4gCj4gPiBAQCAtMTExLDYgKzExOSw5IEBAIHN0YXRpYyB1 bnNpZ25lZCBpbnQgbXRrX2RkcF9tb3V0X2VuKGVudW0gbXRrX2RkcF9jb21wX2lkIGN1ciwKPiA+ ICAJaWYgKGN1ciA9PSBERFBfQ09NUE9ORU5UX09WTDAgJiYgbmV4dCA9PSBERFBfQ09NUE9ORU5U X0NPTE9SMCkgewo+ID4gIAkJKmFkZHIgPSBESVNQX1JFR19DT05GSUdfRElTUF9PVkwwX01PVVRf RU47Cj4gPiAgCQl2YWx1ZSA9IE9WTDBfTU9VVF9FTl9DT0xPUjA7Cj4gPiArCX0gZWxzZSBpZiAo Y3VyID09IEREUF9DT01QT05FTlRfT1ZMMCAmJiBuZXh0ID09IEREUF9DT01QT05FTlRfUkRNQTAp IHsKPiA+ICsJCSphZGRyID0gRElTUF9SRUdfQ09ORklHX0RJU1BfT1ZMX01PVVRfRU47Cj4gPiAr CQl2YWx1ZSA9IE9WTF9NT1VUX0VOX1JETUE7Cj4gPiAgCX0gZWxzZSBpZiAoY3VyID09IEREUF9D T01QT05FTlRfT0QgJiYgbmV4dCA9PSBERFBfQ09NUE9ORU5UX1JETUEwKSB7Cj4gPiAgCQkqYWRk ciA9IERJU1BfUkVHX0NPTkZJR19ESVNQX09EX01PVVRfRU47Cj4gPiAgCQl2YWx1ZSA9IE9EX01P VVRfRU5fUkRNQTA7Cj4gPiBAQCAtMTQ4LDYgKzE1OSw5IEBAIHN0YXRpYyB1bnNpZ25lZCBpbnQg bXRrX2RkcF9zZWxfaW4oZW51bSBtdGtfZGRwX2NvbXBfaWQgY3VyLAo+ID4gIAl9IGVsc2UgaWYg KGN1ciA9PSBERFBfQ09NUE9ORU5UX09WTDEgJiYgbmV4dCA9PSBERFBfQ09NUE9ORU5UX0NPTE9S MSkgewo+ID4gIAkJKmFkZHIgPSBESVNQX1JFR19DT05GSUdfRElTUF9DT0xPUjFfU0VMX0lOOwo+ ID4gIAkJdmFsdWUgPSBDT0xPUjFfU0VMX0lOX09WTDE7Cj4gPiArCX0gZWxzZSBpZiAoY3VyID09 IEREUF9DT01QT05FTlRfQkxTICYmIG5leHQgPT0gRERQX0NPTVBPTkVOVF9EU0kwKSB7Cj4gCj4g RERQX0NPTVBPTkVOVF9CTFMgaXMgYSBuZXcgc3ltYm9sIHdoaWNoIGlzIGRlZmluZWQgaW4gOXRo IHBhdGNoIG9mIHRoaXMKPiBzZXJpZXMuIEkgdGhpbmsgdGhlIGRlZmluaXRpb24gb2YgRERQX0NP TVBPTkVOVF9CTFMgc2hvdWxkIGJlIGluIGZyb250Cj4gb2YgdGhpcyBwYXRjaC4KT0ssIHdlIHdp bGwgbW92ZSB0aGUgZGVmaW5pdGlvbiB0byB0aGlzIHBhdGNoLgoKUmVnYXJkcywKeXQuc2hlbgoK PiAKPiA+ICsJCSphZGRyID0gRElTUF9SRUdfQ09ORklHX0RTSV9TRUw7Cj4gPiArCQl2YWx1ZSA9 IERTSV9TRUxfSU5fQkxTOwo+ID4gIAl9IGVsc2Ugewo+ID4gIAkJdmFsdWUgPSAwOwo+ID4gIAl9 Cj4gPiBAQCAtMTU1LDYgKzE2OSwxNSBAQCBzdGF0aWMgdW5zaWduZWQgaW50IG10a19kZHBfc2Vs X2luKGVudW0gbXRrX2RkcF9jb21wX2lkIGN1ciwKPiA+ICAJcmV0dXJuIHZhbHVlOwo+ID4gIH0K PiA+ICAKPiAKPiBSZWdhcmRzLAo+IENLCj4gCj4gCgoKX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxA bGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxt YW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: yt.shen@mediatek.com (YT Shen) Date: Mon, 12 Sep 2016 18:16:42 +0800 Subject: [PATCH v7 4/9] drm/mediatek: update display module connections In-Reply-To: <1473147546.11736.7.camel@mtksdaap41> References: <1472815484-43821-1-git-send-email-yt.shen@mediatek.com> <1472815484-43821-5-git-send-email-yt.shen@mediatek.com> <1473147546.11736.7.camel@mtksdaap41> Message-ID: <1473675402.12398.28.camel@mtksdaap41> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi CK, On Tue, 2016-09-06 at 15:39 +0800, CK Hu wrote: > Hi, YT: > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > > update connections for OVL, RDMA, BLS, DSI > > > > Signed-off-by: YT Shen > > --- > > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 25 +++++++++++++++++++++++++ > > 1 file changed, 25 insertions(+) > > > > [snip...] > > > @@ -111,6 +119,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, > > if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_COLOR0) { > > *addr = DISP_REG_CONFIG_DISP_OVL0_MOUT_EN; > > value = OVL0_MOUT_EN_COLOR0; > > + } else if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_RDMA0) { > > + *addr = DISP_REG_CONFIG_DISP_OVL_MOUT_EN; > > + value = OVL_MOUT_EN_RDMA; > > } else if (cur == DDP_COMPONENT_OD && next == DDP_COMPONENT_RDMA0) { > > *addr = DISP_REG_CONFIG_DISP_OD_MOUT_EN; > > value = OD_MOUT_EN_RDMA0; > > @@ -148,6 +159,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, > > } else if (cur == DDP_COMPONENT_OVL1 && next == DDP_COMPONENT_COLOR1) { > > *addr = DISP_REG_CONFIG_DISP_COLOR1_SEL_IN; > > value = COLOR1_SEL_IN_OVL1; > > + } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) { > > DDP_COMPONENT_BLS is a new symbol which is defined in 9th patch of this > series. I think the definition of DDP_COMPONENT_BLS should be in front > of this patch. OK, we will move the definition to this patch. Regards, yt.shen > > > + *addr = DISP_REG_CONFIG_DSI_SEL; > > + value = DSI_SEL_IN_BLS; > > } else { > > value = 0; > > } > > @@ -155,6 +169,15 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur, > > return value; > > } > > > > Regards, > CK > >