From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757793AbcILKRB (ORCPT ); Mon, 12 Sep 2016 06:17:01 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:24231 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1757715AbcILKQ7 (ORCPT ); Mon, 12 Sep 2016 06:16:59 -0400 Message-ID: <1473675413.12398.29.camel@mtksdaap41> Subject: Re: [PATCH v7 9/9] drm/mediatek: add support for Mediatek SoC MT2701 From: YT Shen To: CK Hu CC: , Philipp Zabel , David Airlie , Matthias Brugger , Daniel Kurtz , Mao Huang , Bibby Hsieh , "Daniel Vetter" , Thierry Reding , Jie Qiu , Maxime Ripard , Chris Wilson , shaoming chen , Jitao Shi , Boris Brezillon , Dan Carpenter , , , , , Sascha Hauer , , Date: Mon, 12 Sep 2016 18:16:53 +0800 In-Reply-To: <1473226653.11736.33.camel@mtksdaap41> References: <1472815484-43821-1-git-send-email-yt.shen@mediatek.com> <1472815484-43821-10-git-send-email-yt.shen@mediatek.com> <1473226653.11736.33.camel@mtksdaap41> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi CK, On Wed, 2016-09-07 at 13:37 +0800, CK Hu wrote: > Hi, YT: > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > > This patch add support for the Mediatek MT2701 DISP subsystem. > > There is only one OVL engine in MT2701. > > > > Signed-off-by: YT Shen > > [snip...] > > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > > index 4b4e449..465819b 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > > @@ -112,6 +112,7 @@ struct mtk_ddp_comp_match { > > > > static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = { > > [DDP_COMPONENT_AAL] = { MTK_DISP_AAL, 0, NULL }, > > + [DDP_COMPONENT_BLS] = { MTK_DISP_PWM, 0, NULL }, > > I think BLS is different than PWM, so this statement should be > > [DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL }; The BLS module actually is a multifunction device, one of them is the PWM function. We only upstream PWM function [1] now, and it is accepted. When there are real use case (gamma function), we will update this part. What do you think? Regards, yt.shen [1] https://patchwork.kernel.org/patch/9223001/ > > > > [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, &ddp_color }, > > [DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, &ddp_color }, > > [DDP_COMPONENT_DPI0] = { MTK_DPI, 0, NULL }, > > Regards, > CK > > From mboxrd@z Thu Jan 1 00:00:00 1970 From: YT Shen Subject: Re: [PATCH v7 9/9] drm/mediatek: add support for Mediatek SoC MT2701 Date: Mon, 12 Sep 2016 18:16:53 +0800 Message-ID: <1473675413.12398.29.camel@mtksdaap41> References: <1472815484-43821-1-git-send-email-yt.shen@mediatek.com> <1472815484-43821-10-git-send-email-yt.shen@mediatek.com> <1473226653.11736.33.camel@mtksdaap41> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1473226653.11736.33.camel@mtksdaap41> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: CK Hu Cc: Daniel Vetter , Jie Qiu , Mao Huang , yingjoe.chen@mediatek.com, Dan Carpenter , Jitao Shi , Sascha Hauer , linux-mediatek@lists.infradead.org, dri-devel@lists.freedesktop.org, Matthias Brugger , shaoming chen , linux-arm-kernel@lists.infradead.org, srv_heupstream@mediatek.com, emil.l.velikov@gmail.com, linux-kernel@vger.kernel.org, Maxime Ripard List-Id: linux-mediatek@lists.infradead.org SGkgQ0ssCgpPbiBXZWQsIDIwMTYtMDktMDcgYXQgMTM6MzcgKzA4MDAsIENLIEh1IHdyb3RlOgo+ IEhpLCBZVDoKPiAKPiBPbiBGcmksIDIwMTYtMDktMDIgYXQgMTk6MjQgKzA4MDAsIFlUIFNoZW4g d3JvdGU6Cj4gPiBUaGlzIHBhdGNoIGFkZCBzdXBwb3J0IGZvciB0aGUgTWVkaWF0ZWsgTVQyNzAx IERJU1Agc3Vic3lzdGVtLgo+ID4gVGhlcmUgaXMgb25seSBvbmUgT1ZMIGVuZ2luZSBpbiBNVDI3 MDEuCj4gPiAKPiA+IFNpZ25lZC1vZmYtYnk6IFlUIFNoZW4gPHl0LnNoZW5AbWVkaWF0ZWsuY29t Pgo+IAo+IFtzbmlwLi4uXQo+IAo+ID4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9tZWRp YXRlay9tdGtfZHJtX2RkcF9jb21wLmMgYi9kcml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2Ry bV9kZHBfY29tcC5jCj4gPiBpbmRleCA0YjRlNDQ5Li40NjU4MTliIDEwMDY0NAo+ID4gLS0tIGEv ZHJpdmVycy9ncHUvZHJtL21lZGlhdGVrL210a19kcm1fZGRwX2NvbXAuYwo+ID4gKysrIGIvZHJp dmVycy9ncHUvZHJtL21lZGlhdGVrL210a19kcm1fZGRwX2NvbXAuYwo+ID4gQEAgLTExMiw2ICsx MTIsNyBAQCBzdHJ1Y3QgbXRrX2RkcF9jb21wX21hdGNoIHsKPiA+ICAKPiA+ICBzdGF0aWMgY29u c3Qgc3RydWN0IG10a19kZHBfY29tcF9tYXRjaCBtdGtfZGRwX21hdGNoZXNbRERQX0NPTVBPTkVO VF9JRF9NQVhdID0gewo+ID4gIAlbRERQX0NPTVBPTkVOVF9BQUxdCT0geyBNVEtfRElTUF9BQUws CTAsIE5VTEwgfSwKPiA+ICsJW0REUF9DT01QT05FTlRfQkxTXQk9IHsgTVRLX0RJU1BfUFdNLAkw LCBOVUxMIH0sCj4gCj4gSSB0aGluayBCTFMgaXMgZGlmZmVyZW50IHRoYW4gUFdNLCBzbyB0aGlz IHN0YXRlbWVudCBzaG91bGQgYmUKPiAKPiBbRERQX0NPTVBPTkVOVF9CTFNdID0geyBNVEtfRElT UF9CTFMsIDAsIE5VTEwgfTsKVGhlIEJMUyBtb2R1bGUgYWN0dWFsbHkgaXMgYSBtdWx0aWZ1bmN0 aW9uIGRldmljZSwgb25lIG9mIHRoZW0gaXMgdGhlClBXTSBmdW5jdGlvbi4gIFdlIG9ubHkgdXBz dHJlYW0gUFdNIGZ1bmN0aW9uIFsxXSBub3csIGFuZCBpdCBpcwphY2NlcHRlZC4gIFdoZW4gdGhl cmUgYXJlIHJlYWwgdXNlIGNhc2UgKGdhbW1hIGZ1bmN0aW9uKSwgd2Ugd2lsbCB1cGRhdGUKdGhp cyBwYXJ0LiAgV2hhdCBkbyB5b3UgdGhpbms/CgpSZWdhcmRzLAp5dC5zaGVuCgpbMV0gaHR0cHM6 Ly9wYXRjaHdvcmsua2VybmVsLm9yZy9wYXRjaC85MjIzMDAxLwoKPiAKPiAKPiA+ICAJW0REUF9D T01QT05FTlRfQ09MT1IwXQk9IHsgTVRLX0RJU1BfQ09MT1IsCTAsICZkZHBfY29sb3IgfSwKPiA+ ICAJW0REUF9DT01QT05FTlRfQ09MT1IxXQk9IHsgTVRLX0RJU1BfQ09MT1IsCTEsICZkZHBfY29s b3IgfSwKPiA+ICAJW0REUF9DT01QT05FTlRfRFBJMF0JPSB7IE1US19EUEksCQkwLCBOVUxMIH0s Cj4gCj4gUmVnYXJkcywKPiBDSwo+IAo+IAoKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3Rz LmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xp c3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: yt.shen@mediatek.com (YT Shen) Date: Mon, 12 Sep 2016 18:16:53 +0800 Subject: [PATCH v7 9/9] drm/mediatek: add support for Mediatek SoC MT2701 In-Reply-To: <1473226653.11736.33.camel@mtksdaap41> References: <1472815484-43821-1-git-send-email-yt.shen@mediatek.com> <1472815484-43821-10-git-send-email-yt.shen@mediatek.com> <1473226653.11736.33.camel@mtksdaap41> Message-ID: <1473675413.12398.29.camel@mtksdaap41> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi CK, On Wed, 2016-09-07 at 13:37 +0800, CK Hu wrote: > Hi, YT: > > On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote: > > This patch add support for the Mediatek MT2701 DISP subsystem. > > There is only one OVL engine in MT2701. > > > > Signed-off-by: YT Shen > > [snip...] > > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > > index 4b4e449..465819b 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c > > @@ -112,6 +112,7 @@ struct mtk_ddp_comp_match { > > > > static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = { > > [DDP_COMPONENT_AAL] = { MTK_DISP_AAL, 0, NULL }, > > + [DDP_COMPONENT_BLS] = { MTK_DISP_PWM, 0, NULL }, > > I think BLS is different than PWM, so this statement should be > > [DDP_COMPONENT_BLS] = { MTK_DISP_BLS, 0, NULL }; The BLS module actually is a multifunction device, one of them is the PWM function. We only upstream PWM function [1] now, and it is accepted. When there are real use case (gamma function), we will update this part. What do you think? Regards, yt.shen [1] https://patchwork.kernel.org/patch/9223001/ > > > > [DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, &ddp_color }, > > [DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, &ddp_color }, > > [DDP_COMPONENT_DPI0] = { MTK_DPI, 0, NULL }, > > Regards, > CK > >