[PATCH v2 0/6] ARM: dts: bcm283x: add and use pinctrl groups

[PATCH v2 0/6] ARM: dts: bcm283x: add and use pinctrl groups

[Gerd Hoffmann]

  Hi,

Next round:  Patch 1 is new and adds the pull defines to the device tree
bindings.  Patch 2 adds all the pinctrl groups, in a single patch now,
list sorting caused too many conflicts.  Patch 3-6 put some pinctrl
groups into use, they are unmodified (patches 5-8 in v1).

cheers,
  Gerd

Eric Anholt (1):
  ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

Gerd Hoffmann (5):
  pinctrl: bcm2835: add pull defines to dt bindings
  ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio
  ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
  ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
  ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio

 arch/arm/boot/dts/bcm2835-rpi.dtsi    |  12 +-
 arch/arm/boot/dts/bcm283x.dtsi        | 203 ++++++++++++++++++++++++++++++++++
 drivers/pinctrl/bcm/pinctrl-bcm2835.c |   6 -
 include/dt-bindings/pinctrl/bcm2835.h |   5 +
 4 files changed, 218 insertions(+), 8 deletions(-)

-- 
1.8.3.1

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[PATCH v2 0/6] ARM: dts: bcm283x: add and use pinctrl groups

[Gerd Hoffmann]

  Hi,

Next round:  Patch 1 is new and adds the pull defines to the device tree
bindings.  Patch 2 adds all the pinctrl groups, in a single patch now,
list sorting caused too many conflicts.  Patch 3-6 put some pinctrl
groups into use, they are unmodified (patches 5-8 in v1).

cheers,
  Gerd

Eric Anholt (1):
  ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

Gerd Hoffmann (5):
  pinctrl: bcm2835: add pull defines to dt bindings
  ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio
  ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
  ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
  ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio

 arch/arm/boot/dts/bcm2835-rpi.dtsi    |  12 +-
 arch/arm/boot/dts/bcm283x.dtsi        | 203 ++++++++++++++++++++++++++++++++++
 drivers/pinctrl/bcm/pinctrl-bcm2835.c |   6 -
 include/dt-bindings/pinctrl/bcm2835.h |   5 +
 4 files changed, 218 insertions(+), 8 deletions(-)

-- 
1.8.3.1

[PATCH v2 1/6] pinctrl: bcm2835: add pull defines to dt bindings

[Gerd Hoffmann]

Also delete (unused) private enum from driver.
The pull defines can be used instead if needed.

Signed-off-by: Gerd Hoffmann <kraxel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 ------
 include/dt-bindings/pinctrl/bcm2835.h | 5 +++++
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index fa77165..4cf612b 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -76,12 +76,6 @@ enum bcm2835_pinconf_param {
 	BCM2835_PINCONF_PARAM_PULL,
 };
 
-enum bcm2835_pinconf_pull {
-	BCM2835_PINCONFIG_PULL_NONE,
-	BCM2835_PINCONFIG_PULL_DOWN,
-	BCM2835_PINCONFIG_PULL_UP,
-};
-
 #define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
 #define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
 #define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
diff --git a/include/dt-bindings/pinctrl/bcm2835.h b/include/dt-bindings/pinctrl/bcm2835.h
index 6f0bc37..e4e4fdf 100644
--- a/include/dt-bindings/pinctrl/bcm2835.h
+++ b/include/dt-bindings/pinctrl/bcm2835.h
@@ -24,4 +24,9 @@
 #define BCM2835_FSEL_ALT2	6
 #define BCM2835_FSEL_ALT3	7
 
+/* brcm,pull property */
+#define BCM2835_PUD_OFF		0
+#define BCM2835_PUD_DOWN	1
+#define BCM2835_PUD_UP		2
+
 #endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */
-- 
1.8.3.1

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[PATCH v2 1/6] pinctrl: bcm2835: add pull defines to dt bindings

[Gerd Hoffmann]

Also delete (unused) private enum from driver.
The pull defines can be used instead if needed.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 ------
 include/dt-bindings/pinctrl/bcm2835.h | 5 +++++
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index fa77165..4cf612b 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -76,12 +76,6 @@ enum bcm2835_pinconf_param {
 	BCM2835_PINCONF_PARAM_PULL,
 };
 
-enum bcm2835_pinconf_pull {
-	BCM2835_PINCONFIG_PULL_NONE,
-	BCM2835_PINCONFIG_PULL_DOWN,
-	BCM2835_PINCONFIG_PULL_UP,
-};
-
 #define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
 #define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
 #define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
diff --git a/include/dt-bindings/pinctrl/bcm2835.h b/include/dt-bindings/pinctrl/bcm2835.h
index 6f0bc37..e4e4fdf 100644
--- a/include/dt-bindings/pinctrl/bcm2835.h
+++ b/include/dt-bindings/pinctrl/bcm2835.h
@@ -24,4 +24,9 @@
 #define BCM2835_FSEL_ALT2	6
 #define BCM2835_FSEL_ALT3	7
 
+/* brcm,pull property */
+#define BCM2835_PUD_OFF		0
+#define BCM2835_PUD_DOWN	1
+#define BCM2835_PUD_UP		2
+
 #endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */
-- 
1.8.3.1

[PATCH v2 1/6] pinctrl: bcm2835: add pull defines to dt bindings

[Gerd Hoffmann]

Also delete (unused) private enum from driver.
The pull defines can be used instead if needed.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 ------
 include/dt-bindings/pinctrl/bcm2835.h | 5 +++++
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
index fa77165..4cf612b 100644
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
@@ -76,12 +76,6 @@ enum bcm2835_pinconf_param {
 	BCM2835_PINCONF_PARAM_PULL,
 };
 
-enum bcm2835_pinconf_pull {
-	BCM2835_PINCONFIG_PULL_NONE,
-	BCM2835_PINCONFIG_PULL_DOWN,
-	BCM2835_PINCONFIG_PULL_UP,
-};
-
 #define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
 #define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
 #define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
diff --git a/include/dt-bindings/pinctrl/bcm2835.h b/include/dt-bindings/pinctrl/bcm2835.h
index 6f0bc37..e4e4fdf 100644
--- a/include/dt-bindings/pinctrl/bcm2835.h
+++ b/include/dt-bindings/pinctrl/bcm2835.h
@@ -24,4 +24,9 @@
 #define BCM2835_FSEL_ALT2	6
 #define BCM2835_FSEL_ALT3	7
 
+/* brcm,pull property */
+#define BCM2835_PUD_OFF		0
+#define BCM2835_PUD_DOWN	1
+#define BCM2835_PUD_UP		2
+
 #endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */
-- 
1.8.3.1

[PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Gerd Hoffmann]

From: Eric Anholt <eric@anholt.net>

The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made.  With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.

Signed-off-by: Eric Anholt <eric@anholt.net>

squashed in:
  ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
  ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
  ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.

fixups by kraxel:
  * fix spi0 name
  * sort & group entries
  * use pull defines
  * add dpi group

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 203 insertions(+)

diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 4d9f3ab..7b03b63 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -131,6 +131,209 @@
 
 			interrupt-controller;
 			#interrupt-cells = <2>;
+
+			/* Defines pin muxing groups according to
+			 * BCM2835-ARM-Peripherals.pdf page 102.
+			 *
+			 * While each pin can have its mux selected
+			 * for various functions individually, some
+			 * groups only make sense to switch to a
+			 * particular function together.
+			 */
+			dpi_gpio4: dpi_gpio4 {
+				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
+					     12 13 14 15 16 17 18 19
+					     20 21 22 23 24 25 26 27>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+			emmc_gpio22: emmc_gpio22 {
+				brcm,pins = <22 23 24 25 26 27>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+			emmc_gpio34: emmc_gpio34 {
+				brcm,pins = <34 35 36 37 38 39>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+				brcm,pull = <BCM2835_PUD_OFF
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP>;
+			};
+			emmc_gpio48: emmc_gpio48 {
+				brcm,pins = <48 49 50 51 52 53>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+
+			gpclk0_gpio4: gpclk0_gpio4 {
+				brcm,pins = <4>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk1_gpio5: gpclk1_gpio5 {
+				brcm,pins = <5>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk1_gpio42: gpclk1_gpio42 {
+				brcm,pins = <42>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk1_gpio44: gpclk1_gpio44 {
+				brcm,pins = <44>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk2_gpio6: gpclk2_gpio6 {
+				brcm,pins = <6>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk2_gpio43: gpclk2_gpio43 {
+				brcm,pins = <43>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+
+			i2c0_gpio0: i2c0_gpio0 {
+				brcm,pins = <0 1>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			i2c0_gpio32: i2c0_gpio32 {
+				brcm,pins = <32 34>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			i2c0_gpio44: i2c0_gpio44 {
+				brcm,pins = <44 45>;
+				brcm,function = <BCM2835_FSEL_ALT1>;
+			};
+			i2c1_gpio2: i2c1_gpio2 {
+				brcm,pins = <2 3>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			i2c1_gpio44: i2c1_gpio44 {
+				brcm,pins = <44 45>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+			i2c_slave_gpio18: i2c_slave_gpio18 {
+				brcm,pins = <18 19 20 21>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+
+			jtag_gpio4: jtag_gpio4 {
+				brcm,pins = <4 5 6 12 13>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+			jtag_gpio22: jtag_gpio22 {
+				brcm,pins = <22 23 24 25 26 27>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+
+			pcm_gpio18: pcm_gpio18 {
+				brcm,pins = <18 19 20 21>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pcm_gpio28: pcm_gpio28 {
+				brcm,pins = <28 29 30 31>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+
+			pwm0_gpio12: pwm0_gpio12 {
+				brcm,pins = <12>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm0_gpio18: pwm0_gpio18 {
+				brcm,pins = <18>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			pwm0_gpio40: pwm0_gpio40 {
+				brcm,pins = <40>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm1_gpio13: pwm1_gpio13 {
+				brcm,pins = <13>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm1_gpio19: pwm1_gpio19 {
+				brcm,pins = <19>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			pwm1_gpio41: pwm1_gpio41 {
+				brcm,pins = <41>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm1_gpio45: pwm1_gpio45 {
+				brcm,pins = <45>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+
+			sdhost_gpio48: sdhost_gpio48 {
+				brcm,pins = <48 49 50 51 52 53>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+
+			spi0_gpio7: spi0_gpio7 {
+				brcm,pins = <7 8 9 10 11>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			spi0_gpio35: spi0_gpio35 {
+				brcm,pins = <35 36 37 38 39>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			spi1_gpio16: spi1_gpio16 {
+				brcm,pins = <16 17 18 19 20 21>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+			spi2_gpio40: spi2_gpio40 {
+				brcm,pins = <40 41 42 43 44 45>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+
+			uart0_gpio14: uart0_gpio14 {
+				brcm,pins = <14 15>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			/* Separate from the uart0_gpio14 group
+			 * because it conflicts with spi1_gpio16, and
+			 * people often run uart0 on the two pins
+			 * without flow contrl.
+			 */
+			uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
+				brcm,pins = <16 17>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+			uart0_gpio30: uart0_gpio30 {
+				brcm,pins = <30 31>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+			uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+				brcm,pins = <32 33>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+
+			uart1_gpio14: uart1_gpio14 {
+				brcm,pins = <14 15>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
+				brcm,pins = <16 17>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_gpio32: uart1_gpio32 {
+				brcm,pins = <32 33>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
+				brcm,pins = <30 31>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_gpio36: uart1_gpio36 {
+				brcm,pins = <36 37 38 39>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+			uart1_gpio40: uart1_gpio40 {
+				brcm,pins = <40 41>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
+				brcm,pins = <42 43>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
 		};
 
 		uart0: serial@7e201000 {
-- 
1.8.3.1

[PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Gerd Hoffmann]

From: Eric Anholt <eric@anholt.net>

The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made.  With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.

Signed-off-by: Eric Anholt <eric@anholt.net>

squashed in:
  ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
  ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
  ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.

fixups by kraxel:
  * fix spi0 name
  * sort & group entries
  * use pull defines
  * add dpi group

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 203 insertions(+)

diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 4d9f3ab..7b03b63 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -131,6 +131,209 @@
 
 			interrupt-controller;
 			#interrupt-cells = <2>;
+
+			/* Defines pin muxing groups according to
+			 * BCM2835-ARM-Peripherals.pdf page 102.
+			 *
+			 * While each pin can have its mux selected
+			 * for various functions individually, some
+			 * groups only make sense to switch to a
+			 * particular function together.
+			 */
+			dpi_gpio4: dpi_gpio4 {
+				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
+					     12 13 14 15 16 17 18 19
+					     20 21 22 23 24 25 26 27>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+			emmc_gpio22: emmc_gpio22 {
+				brcm,pins = <22 23 24 25 26 27>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+			emmc_gpio34: emmc_gpio34 {
+				brcm,pins = <34 35 36 37 38 39>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+				brcm,pull = <BCM2835_PUD_OFF
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP>;
+			};
+			emmc_gpio48: emmc_gpio48 {
+				brcm,pins = <48 49 50 51 52 53>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+
+			gpclk0_gpio4: gpclk0_gpio4 {
+				brcm,pins = <4>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk1_gpio5: gpclk1_gpio5 {
+				brcm,pins = <5>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk1_gpio42: gpclk1_gpio42 {
+				brcm,pins = <42>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk1_gpio44: gpclk1_gpio44 {
+				brcm,pins = <44>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk2_gpio6: gpclk2_gpio6 {
+				brcm,pins = <6>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk2_gpio43: gpclk2_gpio43 {
+				brcm,pins = <43>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+
+			i2c0_gpio0: i2c0_gpio0 {
+				brcm,pins = <0 1>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			i2c0_gpio32: i2c0_gpio32 {
+				brcm,pins = <32 34>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			i2c0_gpio44: i2c0_gpio44 {
+				brcm,pins = <44 45>;
+				brcm,function = <BCM2835_FSEL_ALT1>;
+			};
+			i2c1_gpio2: i2c1_gpio2 {
+				brcm,pins = <2 3>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			i2c1_gpio44: i2c1_gpio44 {
+				brcm,pins = <44 45>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+			i2c_slave_gpio18: i2c_slave_gpio18 {
+				brcm,pins = <18 19 20 21>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+
+			jtag_gpio4: jtag_gpio4 {
+				brcm,pins = <4 5 6 12 13>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+			jtag_gpio22: jtag_gpio22 {
+				brcm,pins = <22 23 24 25 26 27>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+
+			pcm_gpio18: pcm_gpio18 {
+				brcm,pins = <18 19 20 21>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pcm_gpio28: pcm_gpio28 {
+				brcm,pins = <28 29 30 31>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+
+			pwm0_gpio12: pwm0_gpio12 {
+				brcm,pins = <12>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm0_gpio18: pwm0_gpio18 {
+				brcm,pins = <18>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			pwm0_gpio40: pwm0_gpio40 {
+				brcm,pins = <40>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm1_gpio13: pwm1_gpio13 {
+				brcm,pins = <13>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm1_gpio19: pwm1_gpio19 {
+				brcm,pins = <19>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			pwm1_gpio41: pwm1_gpio41 {
+				brcm,pins = <41>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm1_gpio45: pwm1_gpio45 {
+				brcm,pins = <45>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+
+			sdhost_gpio48: sdhost_gpio48 {
+				brcm,pins = <48 49 50 51 52 53>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+
+			spi0_gpio7: spi0_gpio7 {
+				brcm,pins = <7 8 9 10 11>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			spi0_gpio35: spi0_gpio35 {
+				brcm,pins = <35 36 37 38 39>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			spi1_gpio16: spi1_gpio16 {
+				brcm,pins = <16 17 18 19 20 21>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+			spi2_gpio40: spi2_gpio40 {
+				brcm,pins = <40 41 42 43 44 45>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+
+			uart0_gpio14: uart0_gpio14 {
+				brcm,pins = <14 15>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			/* Separate from the uart0_gpio14 group
+			 * because it conflicts with spi1_gpio16, and
+			 * people often run uart0 on the two pins
+			 * without flow contrl.
+			 */
+			uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
+				brcm,pins = <16 17>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+			uart0_gpio30: uart0_gpio30 {
+				brcm,pins = <30 31>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+			uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+				brcm,pins = <32 33>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+
+			uart1_gpio14: uart1_gpio14 {
+				brcm,pins = <14 15>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
+				brcm,pins = <16 17>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_gpio32: uart1_gpio32 {
+				brcm,pins = <32 33>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
+				brcm,pins = <30 31>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_gpio36: uart1_gpio36 {
+				brcm,pins = <36 37 38 39>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+			uart1_gpio40: uart1_gpio40 {
+				brcm,pins = <40 41>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
+				brcm,pins = <42 43>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
 		};
 
 		uart0: serial@7e201000 {
-- 
1.8.3.1

[PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Gerd Hoffmann]

From: Eric Anholt <eric@anholt.net>

The BCM2835-ARM-Peripherals.pdf documentation specifies what the
function selects do for the pins, and there are a bunch of obvious
groupings to be made.  With these created, we'll be able to replace
bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
references to specific groups we want enabled.

Signed-off-by: Eric Anholt <eric@anholt.net>

squashed in:
  ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
  ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
  ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.

fixups by kraxel:
  * fix spi0 name
  * sort & group entries
  * use pull defines
  * add dpi group

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 203 insertions(+)

diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 4d9f3ab..7b03b63 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -131,6 +131,209 @@
 
 			interrupt-controller;
 			#interrupt-cells = <2>;
+
+			/* Defines pin muxing groups according to
+			 * BCM2835-ARM-Peripherals.pdf page 102.
+			 *
+			 * While each pin can have its mux selected
+			 * for various functions individually, some
+			 * groups only make sense to switch to a
+			 * particular function together.
+			 */
+			dpi_gpio4: dpi_gpio4 {
+				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
+					     12 13 14 15 16 17 18 19
+					     20 21 22 23 24 25 26 27>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+			emmc_gpio22: emmc_gpio22 {
+				brcm,pins = <22 23 24 25 26 27>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+			emmc_gpio34: emmc_gpio34 {
+				brcm,pins = <34 35 36 37 38 39>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+				brcm,pull = <BCM2835_PUD_OFF
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP
+					     BCM2835_PUD_UP>;
+			};
+			emmc_gpio48: emmc_gpio48 {
+				brcm,pins = <48 49 50 51 52 53>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+
+			gpclk0_gpio4: gpclk0_gpio4 {
+				brcm,pins = <4>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk1_gpio5: gpclk1_gpio5 {
+				brcm,pins = <5>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk1_gpio42: gpclk1_gpio42 {
+				brcm,pins = <42>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk1_gpio44: gpclk1_gpio44 {
+				brcm,pins = <44>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk2_gpio6: gpclk2_gpio6 {
+				brcm,pins = <6>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			gpclk2_gpio43: gpclk2_gpio43 {
+				brcm,pins = <43>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+
+			i2c0_gpio0: i2c0_gpio0 {
+				brcm,pins = <0 1>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			i2c0_gpio32: i2c0_gpio32 {
+				brcm,pins = <32 34>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			i2c0_gpio44: i2c0_gpio44 {
+				brcm,pins = <44 45>;
+				brcm,function = <BCM2835_FSEL_ALT1>;
+			};
+			i2c1_gpio2: i2c1_gpio2 {
+				brcm,pins = <2 3>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			i2c1_gpio44: i2c1_gpio44 {
+				brcm,pins = <44 45>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+			i2c_slave_gpio18: i2c_slave_gpio18 {
+				brcm,pins = <18 19 20 21>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+
+			jtag_gpio4: jtag_gpio4 {
+				brcm,pins = <4 5 6 12 13>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+			jtag_gpio22: jtag_gpio22 {
+				brcm,pins = <22 23 24 25 26 27>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+
+			pcm_gpio18: pcm_gpio18 {
+				brcm,pins = <18 19 20 21>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pcm_gpio28: pcm_gpio28 {
+				brcm,pins = <28 29 30 31>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+
+			pwm0_gpio12: pwm0_gpio12 {
+				brcm,pins = <12>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm0_gpio18: pwm0_gpio18 {
+				brcm,pins = <18>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			pwm0_gpio40: pwm0_gpio40 {
+				brcm,pins = <40>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm1_gpio13: pwm1_gpio13 {
+				brcm,pins = <13>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm1_gpio19: pwm1_gpio19 {
+				brcm,pins = <19>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			pwm1_gpio41: pwm1_gpio41 {
+				brcm,pins = <41>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			pwm1_gpio45: pwm1_gpio45 {
+				brcm,pins = <45>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+
+			sdhost_gpio48: sdhost_gpio48 {
+				brcm,pins = <48 49 50 51 52 53>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+
+			spi0_gpio7: spi0_gpio7 {
+				brcm,pins = <7 8 9 10 11>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			spi0_gpio35: spi0_gpio35 {
+				brcm,pins = <35 36 37 38 39>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			spi1_gpio16: spi1_gpio16 {
+				brcm,pins = <16 17 18 19 20 21>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+			spi2_gpio40: spi2_gpio40 {
+				brcm,pins = <40 41 42 43 44 45>;
+				brcm,function = <BCM2835_FSEL_ALT4>;
+			};
+
+			uart0_gpio14: uart0_gpio14 {
+				brcm,pins = <14 15>;
+				brcm,function = <BCM2835_FSEL_ALT0>;
+			};
+			/* Separate from the uart0_gpio14 group
+			 * because it conflicts with spi1_gpio16, and
+			 * people often run uart0 on the two pins
+			 * without flow contrl.
+			 */
+			uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
+				brcm,pins = <16 17>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+			uart0_gpio30: uart0_gpio30 {
+				brcm,pins = <30 31>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+			uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
+				brcm,pins = <32 33>;
+				brcm,function = <BCM2835_FSEL_ALT3>;
+			};
+
+			uart1_gpio14: uart1_gpio14 {
+				brcm,pins = <14 15>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
+				brcm,pins = <16 17>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_gpio32: uart1_gpio32 {
+				brcm,pins = <32 33>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
+				brcm,pins = <30 31>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_gpio36: uart1_gpio36 {
+				brcm,pins = <36 37 38 39>;
+				brcm,function = <BCM2835_FSEL_ALT2>;
+			};
+			uart1_gpio40: uart1_gpio40 {
+				brcm,pins = <40 41>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
+			uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
+				brcm,pins = <42 43>;
+				brcm,function = <BCM2835_FSEL_ALT5>;
+			};
 		};
 
 		uart0: serial at 7e201000 {
-- 
1.8.3.1

[PATCH v2 3/6] ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 88bcd0c..ff62236 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
 	};
 
 	alt0: alt0 {
-		brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 40 45>;
+		brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
 		brcm,function = <BCM2835_FSEL_ALT0>;
 	};
 
@@ -68,6 +68,8 @@
 };
 
 &pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
 	status = "okay";
 };
 
-- 
1.8.3.1

[PATCH v2 3/6] ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 88bcd0c..ff62236 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
 	};
 
 	alt0: alt0 {
-		brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 40 45>;
+		brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
 		brcm,function = <BCM2835_FSEL_ALT0>;
 	};
 
@@ -68,6 +68,8 @@
 };
 
 &pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
 	status = "okay";
 };
 
-- 
1.8.3.1

[PATCH v2 3/6] ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 88bcd0c..ff62236 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
 	};
 
 	alt0: alt0 {
-		brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 40 45>;
+		brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
 		brcm,function = <BCM2835_FSEL_ALT0>;
 	};
 
@@ -68,6 +68,8 @@
 };
 
 &pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
 	status = "okay";
 };
 
-- 
1.8.3.1

[PATCH v2 4/6] ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index ff62236..b936978 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
 	};
 
 	alt0: alt0 {
-		brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
+		brcm,pins = <2 3 4 5 7 8 9 10 11>;
 		brcm,function = <BCM2835_FSEL_ALT0>;
 	};
 
@@ -49,6 +49,8 @@
 };
 
 &i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_gpio0>;
 	status = "okay";
 	clock-frequency = <100000>;
 };
-- 
1.8.3.1

[PATCH v2 4/6] ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index ff62236..b936978 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
 	};
 
 	alt0: alt0 {
-		brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
+		brcm,pins = <2 3 4 5 7 8 9 10 11>;
 		brcm,function = <BCM2835_FSEL_ALT0>;
 	};
 
@@ -49,6 +49,8 @@
 };
 
 &i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_gpio0>;
 	status = "okay";
 	clock-frequency = <100000>;
 };
-- 
1.8.3.1

[PATCH v2 4/6] ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index ff62236..b936978 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
 	};
 
 	alt0: alt0 {
-		brcm,pins = <0 1 2 3 4 5 7 8 9 10 11>;
+		brcm,pins = <2 3 4 5 7 8 9 10 11>;
 		brcm,function = <BCM2835_FSEL_ALT0>;
 	};
 
@@ -49,6 +49,8 @@
 };
 
 &i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_gpio0>;
 	status = "okay";
 	clock-frequency = <100000>;
 };
-- 
1.8.3.1

[PATCH v2 5/6] ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index b936978..8688204 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
 	};
 
 	alt0: alt0 {
-		brcm,pins = <2 3 4 5 7 8 9 10 11>;
+		brcm,pins = <4 5 7 8 9 10 11>;
 		brcm,function = <BCM2835_FSEL_ALT0>;
 	};
 
@@ -56,6 +56,8 @@
 };
 
 &i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_gpio2>;
 	status = "okay";
 	clock-frequency = <100000>;
 };
-- 
1.8.3.1

[PATCH v2 5/6] ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index b936978..8688204 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
 	};
 
 	alt0: alt0 {
-		brcm,pins = <2 3 4 5 7 8 9 10 11>;
+		brcm,pins = <4 5 7 8 9 10 11>;
 		brcm,function = <BCM2835_FSEL_ALT0>;
 	};
 
@@ -56,6 +56,8 @@
 };
 
 &i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_gpio2>;
 	status = "okay";
 	clock-frequency = <100000>;
 };
-- 
1.8.3.1

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[PATCH v2 5/6] ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index b936978..8688204 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -38,7 +38,7 @@
 	};
 
 	alt0: alt0 {
-		brcm,pins = <2 3 4 5 7 8 9 10 11>;
+		brcm,pins = <4 5 7 8 9 10 11>;
 		brcm,function = <BCM2835_FSEL_ALT0>;
 	};
 
@@ -56,6 +56,8 @@
 };
 
 &i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_gpio2>;
 	status = "okay";
 	clock-frequency = <100000>;
 };
-- 
1.8.3.1

[PATCH v2 6/6] ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 8688204..3f0ce61 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -43,7 +43,7 @@
 	};
 
 	alt3: alt3 {
-		brcm,pins = <48 49 50 51 52 53>;
+		brcm,pins = <>;
 		brcm,function = <BCM2835_FSEL_ALT3>;
 	};
 };
@@ -67,6 +67,8 @@
 };
 
 &sdhci {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_gpio48>;
 	status = "okay";
 	bus-width = <4>;
 };
-- 
1.8.3.1

[PATCH v2 6/6] ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 8688204..3f0ce61 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -43,7 +43,7 @@
 	};
 
 	alt3: alt3 {
-		brcm,pins = <48 49 50 51 52 53>;
+		brcm,pins = <>;
 		brcm,function = <BCM2835_FSEL_ALT3>;
 	};
 };
@@ -67,6 +67,8 @@
 };
 
 &sdhci {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_gpio48>;
 	status = "okay";
 	bus-width = <4>;
 };
-- 
1.8.3.1

[PATCH v2 6/6] ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio

[Gerd Hoffmann]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 8688204..3f0ce61 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -43,7 +43,7 @@
 	};
 
 	alt3: alt3 {
-		brcm,pins = <48 49 50 51 52 53>;
+		brcm,pins = <>;
 		brcm,function = <BCM2835_FSEL_ALT3>;
 	};
 };
@@ -67,6 +67,8 @@
 };
 
 &sdhci {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_gpio48>;
 	status = "okay";
 	bus-width = <4>;
 };
-- 
1.8.3.1

Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Stefan Wahren]

Hi Gerd,

> Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> geschrieben:
> 
> 
> From: Eric Anholt <eric@anholt.net>
> 
> The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> function selects do for the pins, and there are a bunch of obvious
> groupings to be made.  With these created, we'll be able to replace
> bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> references to specific groups we want enabled.
> 
> Signed-off-by: Eric Anholt <eric@anholt.net>
> 
> squashed in:
>   ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
>   ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
>   ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> 
> fixups by kraxel:
>   * fix spi0 name
>   * sort & group entries
>   * use pull defines
>   * add dpi group

this looks like a changelog. Please move this at the proper place before the
first "diff" and specify the version.

> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  arch/arm/boot/dts/bcm283x.dtsi | 203
> +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 203 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
> index 4d9f3ab..7b03b63 100644
> --- a/arch/arm/boot/dts/bcm283x.dtsi
> +++ b/arch/arm/boot/dts/bcm283x.dtsi
> @@ -131,6 +131,209 @@
>  
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> +
> +			/* Defines pin muxing groups according to
> +			 * BCM2835-ARM-Peripherals.pdf page 102.
> +			 *
> +			 * While each pin can have its mux selected
> +			 * for various functions individually, some
> +			 * groups only make sense to switch to a
> +			 * particular function together.
> +			 */
> +			dpi_gpio4: dpi_gpio4 {
> +				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> +					     12 13 14 15 16 17 18 19
> +					     20 21 22 23 24 25 26 27>;
> +				brcm,function = <BCM2835_FSEL_ALT2>;
> +			};

s/dpi_gpio4/dpi_gpio0

> +			emmc_gpio22: emmc_gpio22 {
> +				brcm,pins = <22 23 24 25 26 27>;
> +				brcm,function = <BCM2835_FSEL_ALT3>;
> +			};
> +			emmc_gpio34: emmc_gpio34 {
> +				brcm,pins = <34 35 36 37 38 39>;
> +				brcm,function = <BCM2835_FSEL_ALT3>;
> +				brcm,pull = <BCM2835_PUD_OFF
> +					     BCM2835_PUD_UP
> +					     BCM2835_PUD_UP
> +					     BCM2835_PUD_UP
> +					     BCM2835_PUD_UP
> +					     BCM2835_PUD_UP>;
> +			};
> +			emmc_gpio48: emmc_gpio48 {
> +				brcm,pins = <48 49 50 51 52 53>;
> +				brcm,function = <BCM2835_FSEL_ALT3>;
> +			};

Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
for the same eMMC interface. I thought there is a eMMC interface and a SD host
interface with different DMA channels.

> +
> ...
> +
> +			sdhost_gpio48: sdhost_gpio48 {
> +				brcm,pins = <48 49 50 51 52 53>;
> +				brcm,function = <BCM2835_FSEL_ALT0>;
> +			};

I think this incorrect. There is no function ALT0 for these pins, only ALT3.

Regards
Stefan

[PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Stefan Wahren]

Hi Gerd,

> Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> geschrieben:
> 
> 
> From: Eric Anholt <eric@anholt.net>
> 
> The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> function selects do for the pins, and there are a bunch of obvious
> groupings to be made.  With these created, we'll be able to replace
> bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> references to specific groups we want enabled.
> 
> Signed-off-by: Eric Anholt <eric@anholt.net>
> 
> squashed in:
>   ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
>   ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
>   ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> 
> fixups by kraxel:
>   * fix spi0 name
>   * sort & group entries
>   * use pull defines
>   * add dpi group

this looks like a changelog. Please move this at the proper place before the
first "diff" and specify the version.

> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  arch/arm/boot/dts/bcm283x.dtsi | 203
> +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 203 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
> index 4d9f3ab..7b03b63 100644
> --- a/arch/arm/boot/dts/bcm283x.dtsi
> +++ b/arch/arm/boot/dts/bcm283x.dtsi
> @@ -131,6 +131,209 @@
>  
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> +
> +			/* Defines pin muxing groups according to
> +			 * BCM2835-ARM-Peripherals.pdf page 102.
> +			 *
> +			 * While each pin can have its mux selected
> +			 * for various functions individually, some
> +			 * groups only make sense to switch to a
> +			 * particular function together.
> +			 */
> +			dpi_gpio4: dpi_gpio4 {
> +				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> +					     12 13 14 15 16 17 18 19
> +					     20 21 22 23 24 25 26 27>;
> +				brcm,function = <BCM2835_FSEL_ALT2>;
> +			};

s/dpi_gpio4/dpi_gpio0

> +			emmc_gpio22: emmc_gpio22 {
> +				brcm,pins = <22 23 24 25 26 27>;
> +				brcm,function = <BCM2835_FSEL_ALT3>;
> +			};
> +			emmc_gpio34: emmc_gpio34 {
> +				brcm,pins = <34 35 36 37 38 39>;
> +				brcm,function = <BCM2835_FSEL_ALT3>;
> +				brcm,pull = <BCM2835_PUD_OFF
> +					     BCM2835_PUD_UP
> +					     BCM2835_PUD_UP
> +					     BCM2835_PUD_UP
> +					     BCM2835_PUD_UP
> +					     BCM2835_PUD_UP>;
> +			};
> +			emmc_gpio48: emmc_gpio48 {
> +				brcm,pins = <48 49 50 51 52 53>;
> +				brcm,function = <BCM2835_FSEL_ALT3>;
> +			};

Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
for the same eMMC interface. I thought there is a eMMC interface and a SD host
interface with different DMA channels.

> +
> ...
> +
> +			sdhost_gpio48: sdhost_gpio48 {
> +				brcm,pins = <48 49 50 51 52 53>;
> +				brcm,function = <BCM2835_FSEL_ALT0>;
> +			};

I think this incorrect. There is no function ALT0 for these pins, only ALT3.

Regards
Stefan

Re: [PATCH v2 6/6] ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio

[Stefan Wahren]

Hi Gerd,

> Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> geschrieben:
> 
> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi
> b/arch/arm/boot/dts/bcm2835-rpi.dtsi
> index 8688204..3f0ce61 100644
> --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
> +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
> @@ -43,7 +43,7 @@
>  	};
>  
>  	alt3: alt3 {
> -		brcm,pins = <48 49 50 51 52 53>;
> +		brcm,pins = <>;

after dropping all pins from the group alt3 doesn't make sense anymore. I think
this should be removed completely.

>  		brcm,function = <BCM2835_FSEL_ALT3>;
>  	};
>  };
> @@ -67,6 +67,8 @@
>  };
>  
>  &sdhci {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&emmc_gpio48>;
>  	status = "okay";
>  	bus-width = <4>;
>  };
> -- 
> 1.8.3.1
> 
> 
> _______________________________________________
> linux-rpi-kernel mailing list
> linux-rpi-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rpi-kernel

[PATCH v2 6/6] ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio

[Stefan Wahren]

Hi Gerd,

> Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> geschrieben:
> 
> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi
> b/arch/arm/boot/dts/bcm2835-rpi.dtsi
> index 8688204..3f0ce61 100644
> --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
> +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
> @@ -43,7 +43,7 @@
>  	};
>  
>  	alt3: alt3 {
> -		brcm,pins = <48 49 50 51 52 53>;
> +		brcm,pins = <>;

after dropping all pins from the group alt3 doesn't make sense anymore. I think
this should be removed completely.

>  		brcm,function = <BCM2835_FSEL_ALT3>;
>  	};
>  };
> @@ -67,6 +67,8 @@
>  };
>  
>  &sdhci {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&emmc_gpio48>;
>  	status = "okay";
>  	bus-width = <4>;
>  };
> -- 
> 1.8.3.1
> 
> 
> _______________________________________________
> linux-rpi-kernel mailing list
> linux-rpi-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rpi-kernel

Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Stefan Wahren]

Hi Gerd,

> Stefan Wahren <stefan.wahren@i2se.com> hat am 12. September 2016 um 20:19
> geschrieben:
> 
> 
> Hi Gerd,
> 
> > Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> > geschrieben:
> > 
> > 
> > From: Eric Anholt <eric@anholt.net>
> > 
> > The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> > function selects do for the pins, and there are a bunch of obvious
> > groupings to be made.  With these created, we'll be able to replace
> > bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> > references to specific groups we want enabled.
> > 
> > Signed-off-by: Eric Anholt <eric@anholt.net>
> > 
> > squashed in:
> >   ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> >   ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> >   ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> > 
> > fixups by kraxel:
> >   * fix spi0 name
> >   * sort & group entries
> >   * use pull defines
> >   * add dpi group
> 
> this looks like a changelog. Please move this at the proper place before the
> first "diff" and specify the version.
> 
> > 
> > Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> > ---
> >  arch/arm/boot/dts/bcm283x.dtsi | 203
> > +++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 203 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
> > index 4d9f3ab..7b03b63 100644
> > --- a/arch/arm/boot/dts/bcm283x.dtsi
> > +++ b/arch/arm/boot/dts/bcm283x.dtsi
> > @@ -131,6 +131,209 @@
> >  
> >  			interrupt-controller;
> >  			#interrupt-cells = <2>;
> > +
> > +			/* Defines pin muxing groups according to
> > +			 * BCM2835-ARM-Peripherals.pdf page 102.
> > +			 *
> > +			 * While each pin can have its mux selected
> > +			 * for various functions individually, some
> > +			 * groups only make sense to switch to a
> > +			 * particular function together.
> > +			 */
> > +			dpi_gpio4: dpi_gpio4 {
> > +				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> > +					     12 13 14 15 16 17 18 19
> > +					     20 21 22 23 24 25 26 27>;
> > +				brcm,function = <BCM2835_FSEL_ALT2>;
> > +			};
> 
> s/dpi_gpio4/dpi_gpio0
> 
> > +			emmc_gpio22: emmc_gpio22 {
> > +				brcm,pins = <22 23 24 25 26 27>;
> > +				brcm,function = <BCM2835_FSEL_ALT3>;
> > +			};
> > +			emmc_gpio34: emmc_gpio34 {
> > +				brcm,pins = <34 35 36 37 38 39>;
> > +				brcm,function = <BCM2835_FSEL_ALT3>;
> > +				brcm,pull = <BCM2835_PUD_OFF
> > +					     BCM2835_PUD_UP
> > +					     BCM2835_PUD_UP
> > +					     BCM2835_PUD_UP
> > +					     BCM2835_PUD_UP
> > +					     BCM2835_PUD_UP>;
> > +			};
> > +			emmc_gpio48: emmc_gpio48 {
> > +				brcm,pins = <48 49 50 51 52 53>;
> > +				brcm,function = <BCM2835_FSEL_ALT3>;
> > +			};
> 
> Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> for the same eMMC interface. I thought there is a eMMC interface and a SD host
> interface with different DMA channels.
> 
> > +
> > ...
> > +
> > +			sdhost_gpio48: sdhost_gpio48 {
> > +				brcm,pins = <48 49 50 51 52 53>;
> > +				brcm,function = <BCM2835_FSEL_ALT0>;
> > +			};
> 
> I think this incorrect. There is no function ALT0 for these pins, only ALT3.

please forget my last 2 comments. According to this page [1] eMMC is selected by
ALT3 and sdhost is selected by ALT0.

Do you know a reliable source where all muxes for both interface are documented?
The datasheet isn't very helpful here.

Regards
Stefan

[1] - http://pinout.xyz/pinout/sdio

> 
> Regards
> Stefan

[PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Stefan Wahren]

Hi Gerd,

> Stefan Wahren <stefan.wahren@i2se.com> hat am 12. September 2016 um 20:19
> geschrieben:
> 
> 
> Hi Gerd,
> 
> > Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> > geschrieben:
> > 
> > 
> > From: Eric Anholt <eric@anholt.net>
> > 
> > The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> > function selects do for the pins, and there are a bunch of obvious
> > groupings to be made.  With these created, we'll be able to replace
> > bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> > references to specific groups we want enabled.
> > 
> > Signed-off-by: Eric Anholt <eric@anholt.net>
> > 
> > squashed in:
> >   ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> >   ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> >   ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> > 
> > fixups by kraxel:
> >   * fix spi0 name
> >   * sort & group entries
> >   * use pull defines
> >   * add dpi group
> 
> this looks like a changelog. Please move this at the proper place before the
> first "diff" and specify the version.
> 
> > 
> > Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> > ---
> >  arch/arm/boot/dts/bcm283x.dtsi | 203
> > +++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 203 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
> > index 4d9f3ab..7b03b63 100644
> > --- a/arch/arm/boot/dts/bcm283x.dtsi
> > +++ b/arch/arm/boot/dts/bcm283x.dtsi
> > @@ -131,6 +131,209 @@
> >  
> >  			interrupt-controller;
> >  			#interrupt-cells = <2>;
> > +
> > +			/* Defines pin muxing groups according to
> > +			 * BCM2835-ARM-Peripherals.pdf page 102.
> > +			 *
> > +			 * While each pin can have its mux selected
> > +			 * for various functions individually, some
> > +			 * groups only make sense to switch to a
> > +			 * particular function together.
> > +			 */
> > +			dpi_gpio4: dpi_gpio4 {
> > +				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> > +					     12 13 14 15 16 17 18 19
> > +					     20 21 22 23 24 25 26 27>;
> > +				brcm,function = <BCM2835_FSEL_ALT2>;
> > +			};
> 
> s/dpi_gpio4/dpi_gpio0
> 
> > +			emmc_gpio22: emmc_gpio22 {
> > +				brcm,pins = <22 23 24 25 26 27>;
> > +				brcm,function = <BCM2835_FSEL_ALT3>;
> > +			};
> > +			emmc_gpio34: emmc_gpio34 {
> > +				brcm,pins = <34 35 36 37 38 39>;
> > +				brcm,function = <BCM2835_FSEL_ALT3>;
> > +				brcm,pull = <BCM2835_PUD_OFF
> > +					     BCM2835_PUD_UP
> > +					     BCM2835_PUD_UP
> > +					     BCM2835_PUD_UP
> > +					     BCM2835_PUD_UP
> > +					     BCM2835_PUD_UP>;
> > +			};
> > +			emmc_gpio48: emmc_gpio48 {
> > +				brcm,pins = <48 49 50 51 52 53>;
> > +				brcm,function = <BCM2835_FSEL_ALT3>;
> > +			};
> 
> Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> for the same eMMC interface. I thought there is a eMMC interface and a SD host
> interface with different DMA channels.
> 
> > +
> > ...
> > +
> > +			sdhost_gpio48: sdhost_gpio48 {
> > +				brcm,pins = <48 49 50 51 52 53>;
> > +				brcm,function = <BCM2835_FSEL_ALT0>;
> > +			};
> 
> I think this incorrect. There is no function ALT0 for these pins, only ALT3.

please forget my last 2 comments. According to this page [1] eMMC is selected by
ALT3 and sdhost is selected by ALT0.

Do you know a reliable source where all muxes for both interface are documented?
The datasheet isn't very helpful here.

Regards
Stefan

[1] - http://pinout.xyz/pinout/sdio

> 
> Regards
> Stefan

Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Gerd Hoffmann]

On Mo, 2016-09-12 at 20:19 +0200, Stefan Wahren wrote:
> Hi Gerd,
> 
> > Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> > geschrieben:
> > 
> > 
> > From: Eric Anholt <eric@anholt.net>
> > 
> > The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> > function selects do for the pins, and there are a bunch of obvious
> > groupings to be made.  With these created, we'll be able to replace
> > bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> > references to specific groups we want enabled.
> > 
> > Signed-off-by: Eric Anholt <eric@anholt.net>
> > 
> > squashed in:
> >   ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> >   ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> >   ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> > 
> > fixups by kraxel:
> >   * fix spi0 name
> >   * sort & group entries
> >   * use pull defines
> >   * add dpi group
> 
> this looks like a changelog.

It actually is, trying to keep track of what comes from Eric and what
comes from me.  But I guess I can also simply summarize that as "based
on a patch from Eric".

> > +			dpi_gpio4: dpi_gpio4 {
> > +				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> > +					     12 13 14 15 16 17 18 19
> > +					     20 21 22 23 24 25 26 27>;
> > +				brcm,function = <BCM2835_FSEL_ALT2>;
> > +			};
> 
> s/dpi_gpio4/dpi_gpio0

Yea, right, will fix.

cheers,
  Gerd

[PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Gerd Hoffmann]

On Mo, 2016-09-12 at 20:19 +0200, Stefan Wahren wrote:
> Hi Gerd,
> 
> > Gerd Hoffmann <kraxel@redhat.com> hat am 12. September 2016 um 10:22
> > geschrieben:
> > 
> > 
> > From: Eric Anholt <eric@anholt.net>
> > 
> > The BCM2835-ARM-Peripherals.pdf documentation specifies what the
> > function selects do for the pins, and there are a bunch of obvious
> > groupings to be made.  With these created, we'll be able to replace
> > bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
> > references to specific groups we want enabled.
> > 
> > Signed-off-by: Eric Anholt <eric@anholt.net>
> > 
> > squashed in:
> >   ARM: dts: bcm283x: Add the emmc pin group to bcm283x.dtsi.
> >   ARM: dts: bcm283x: Add a group for mapping pins 48-53 to sdhost.
> >   ARM: dts: bcm283x: Add a new EMMC pin group from the downstream tree.
> > 
> > fixups by kraxel:
> >   * fix spi0 name
> >   * sort & group entries
> >   * use pull defines
> >   * add dpi group
> 
> this looks like a changelog.

It actually is, trying to keep track of what comes from Eric and what
comes from me.  But I guess I can also simply summarize that as "based
on a patch from Eric".

> > +			dpi_gpio4: dpi_gpio4 {
> > +				brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
> > +					     12 13 14 15 16 17 18 19
> > +					     20 21 22 23 24 25 26 27>;
> > +				brcm,function = <BCM2835_FSEL_ALT2>;
> > +			};
> 
> s/dpi_gpio4/dpi_gpio0

Yea, right, will fix.

cheers,
  Gerd

Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Gerd Hoffmann]

  Hi,

> > > +			emmc_gpio48: emmc_gpio48 {
> > > +				brcm,pins = <48 49 50 51 52 53>;
> > > +				brcm,function = <BCM2835_FSEL_ALT3>;
> > > +			};
> > 
> > Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> > for the same eMMC interface. I thought there is a eMMC interface and a SD host
> > interface with different DMA channels.
> > 
> > > +
> > > ...
> > > +
> > > +			sdhost_gpio48: sdhost_gpio48 {
> > > +				brcm,pins = <48 49 50 51 52 53>;
> > > +				brcm,function = <BCM2835_FSEL_ALT0>;
> > > +			};
> > 
> > I think this incorrect. There is no function ALT0 for these pins, only ALT3.
> 
> please forget my last 2 comments. According to this page [1] eMMC is selected by
> ALT3 and sdhost is selected by ALT0.
> 
> Do you know a reliable source where all muxes for both interface are documented?
> The datasheet isn't very helpful here.

No, I don't know any source better than the datasheet @ github.
Yes, I tried to double-check things with the sheet too.

IIRC Eric mentioned a while back in some mail or patch that he checked
something for the rpi device tree with non-public docs, not fully sure
though whenever it was emmc/sdhost or something else.  But I'm basically
trusting Eric here ...

cheers,
  Gerd

PS: This is exactly why I think it us useful to have all those entries
    in the dt file even if unused:  To serve as documentation.

Re: [PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Gerd Hoffmann]

  Hi,

> > > +			emmc_gpio48: emmc_gpio48 {
> > > +				brcm,pins = <48 49 50 51 52 53>;
> > > +				brcm,function = <BCM2835_FSEL_ALT3>;
> > > +			};
> > 
> > Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> > for the same eMMC interface. I thought there is a eMMC interface and a SD host
> > interface with different DMA channels.
> > 
> > > +
> > > ...
> > > +
> > > +			sdhost_gpio48: sdhost_gpio48 {
> > > +				brcm,pins = <48 49 50 51 52 53>;
> > > +				brcm,function = <BCM2835_FSEL_ALT0>;
> > > +			};
> > 
> > I think this incorrect. There is no function ALT0 for these pins, only ALT3.
> 
> please forget my last 2 comments. According to this page [1] eMMC is selected by
> ALT3 and sdhost is selected by ALT0.
> 
> Do you know a reliable source where all muxes for both interface are documented?
> The datasheet isn't very helpful here.

No, I don't know any source better than the datasheet @ github.
Yes, I tried to double-check things with the sheet too.

IIRC Eric mentioned a while back in some mail or patch that he checked
something for the rpi device tree with non-public docs, not fully sure
though whenever it was emmc/sdhost or something else.  But I'm basically
trusting Eric here ...

cheers,
  Gerd

PS: This is exactly why I think it us useful to have all those entries
    in the dt file even if unused:  To serve as documentation.
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[PATCH v2 2/6] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio node.

[Gerd Hoffmann]

  Hi,

> > > +			emmc_gpio48: emmc_gpio48 {
> > > +				brcm,pins = <48 49 50 51 52 53>;
> > > +				brcm,function = <BCM2835_FSEL_ALT3>;
> > > +			};
> > 
> > Sorry, i didn't notice this before. The naming of these groups suggest 3 muxes
> > for the same eMMC interface. I thought there is a eMMC interface and a SD host
> > interface with different DMA channels.
> > 
> > > +
> > > ...
> > > +
> > > +			sdhost_gpio48: sdhost_gpio48 {
> > > +				brcm,pins = <48 49 50 51 52 53>;
> > > +				brcm,function = <BCM2835_FSEL_ALT0>;
> > > +			};
> > 
> > I think this incorrect. There is no function ALT0 for these pins, only ALT3.
> 
> please forget my last 2 comments. According to this page [1] eMMC is selected by
> ALT3 and sdhost is selected by ALT0.
> 
> Do you know a reliable source where all muxes for both interface are documented?
> The datasheet isn't very helpful here.

No, I don't know any source better than the datasheet @ github.
Yes, I tried to double-check things with the sheet too.

IIRC Eric mentioned a while back in some mail or patch that he checked
something for the rpi device tree with non-public docs, not fully sure
though whenever it was emmc/sdhost or something else.  But I'm basically
trusting Eric here ...

cheers,
  Gerd

PS: This is exactly why I think it us useful to have all those entries
    in the dt file even if unused:  To serve as documentation.