From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758690AbcIMKSY (ORCPT ); Tue, 13 Sep 2016 06:18:24 -0400 Received: from fw-tnat.cambridge.arm.com ([217.140.96.140]:24385 "EHLO cam-smtp0.cambridge.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1758548AbcIMKRv (ORCPT ); Tue, 13 Sep 2016 06:17:51 -0400 From: Punit Agrawal To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: Punit Agrawal , Christoffer Dall , Marc Zyngier , Steven Rostedt , Ingo Molnar , Will Deacon Subject: [PATCH 7/7] arm64: KVM: Enable selective trapping of TLB instructions Date: Tue, 13 Sep 2016 11:16:09 +0100 Message-Id: <1473761769-30572-8-git-send-email-punit.agrawal@arm.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1473761769-30572-1-git-send-email-punit.agrawal@arm.com> References: <1473761769-30572-1-git-send-email-punit.agrawal@arm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The TTLB bit of Hypervisor Control Register (HCR_EL2) controls the trapping of guest TLB maintenance instructions. Taking the trap requires a switch to the hypervisor and is an expensive operation. Enable selective trapping of guest TLB instructions when the associated perf trace event is enabled for a specific virtual machine. Signed-off-by: Punit Agrawal Cc: Christoffer Dall Cc: Marc Zyngier --- arch/arm64/kvm/perf_trace.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/kvm/perf_trace.c b/arch/arm64/kvm/perf_trace.c index 1cafbc9..649ca55 100644 --- a/arch/arm64/kvm/perf_trace.c +++ b/arch/arm64/kvm/perf_trace.c @@ -17,6 +17,8 @@ #include #include +#include + typedef int (*perf_trace_callback_fn)(struct kvm *kvm, bool enable); struct kvm_trace_hook { @@ -24,7 +26,37 @@ struct kvm_trace_hook { perf_trace_callback_fn setup_fn; }; +static int tlb_invalidate_trap(struct kvm *kvm, bool enable) +{ + int i; + struct kvm_vcpu *vcpu; + + /* + * Halt the VM to ensure atomic update across all vcpus (this + * avoids racy behaviour against other modifications of + * HCR_EL2 such as kvm_toggle_cache/kvm_set_way_flush). + */ + kvm_arm_halt_guest(kvm); + kvm_for_each_vcpu(i, vcpu, kvm) { + unsigned long hcr = vcpu_get_hcr(vcpu); + + if (enable) + hcr |= HCR_TTLB; + else + hcr &= ~HCR_TTLB; + + vcpu_set_hcr(vcpu, hcr); + } + kvm_arm_resume_guest(kvm); + + return 0; +} + static struct kvm_trace_hook trace_hook[] = { + { + .key = "kvm_tlb_invalidate", + .setup_fn = tlb_invalidate_trap, + }, { }, }; -- 2.8.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Punit Agrawal Subject: [PATCH 7/7] arm64: KVM: Enable selective trapping of TLB instructions Date: Tue, 13 Sep 2016 11:16:09 +0100 Message-ID: <1473761769-30572-8-git-send-email-punit.agrawal@arm.com> References: <1473761769-30572-1-git-send-email-punit.agrawal@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: Marc Zyngier , Punit Agrawal , Will Deacon , Steven Rostedt , Ingo Molnar To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Return-path: In-Reply-To: <1473761769-30572-1-git-send-email-punit.agrawal@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu List-Id: kvm.vger.kernel.org The TTLB bit of Hypervisor Control Register (HCR_EL2) controls the trapping of guest TLB maintenance instructions. Taking the trap requires a switch to the hypervisor and is an expensive operation. Enable selective trapping of guest TLB instructions when the associated perf trace event is enabled for a specific virtual machine. Signed-off-by: Punit Agrawal Cc: Christoffer Dall Cc: Marc Zyngier --- arch/arm64/kvm/perf_trace.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/kvm/perf_trace.c b/arch/arm64/kvm/perf_trace.c index 1cafbc9..649ca55 100644 --- a/arch/arm64/kvm/perf_trace.c +++ b/arch/arm64/kvm/perf_trace.c @@ -17,6 +17,8 @@ #include #include +#include + typedef int (*perf_trace_callback_fn)(struct kvm *kvm, bool enable); struct kvm_trace_hook { @@ -24,7 +26,37 @@ struct kvm_trace_hook { perf_trace_callback_fn setup_fn; }; +static int tlb_invalidate_trap(struct kvm *kvm, bool enable) +{ + int i; + struct kvm_vcpu *vcpu; + + /* + * Halt the VM to ensure atomic update across all vcpus (this + * avoids racy behaviour against other modifications of + * HCR_EL2 such as kvm_toggle_cache/kvm_set_way_flush). + */ + kvm_arm_halt_guest(kvm); + kvm_for_each_vcpu(i, vcpu, kvm) { + unsigned long hcr = vcpu_get_hcr(vcpu); + + if (enable) + hcr |= HCR_TTLB; + else + hcr &= ~HCR_TTLB; + + vcpu_set_hcr(vcpu, hcr); + } + kvm_arm_resume_guest(kvm); + + return 0; +} + static struct kvm_trace_hook trace_hook[] = { + { + .key = "kvm_tlb_invalidate", + .setup_fn = tlb_invalidate_trap, + }, { }, }; -- 2.8.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: punit.agrawal@arm.com (Punit Agrawal) Date: Tue, 13 Sep 2016 11:16:09 +0100 Subject: [PATCH 7/7] arm64: KVM: Enable selective trapping of TLB instructions In-Reply-To: <1473761769-30572-1-git-send-email-punit.agrawal@arm.com> References: <1473761769-30572-1-git-send-email-punit.agrawal@arm.com> Message-ID: <1473761769-30572-8-git-send-email-punit.agrawal@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The TTLB bit of Hypervisor Control Register (HCR_EL2) controls the trapping of guest TLB maintenance instructions. Taking the trap requires a switch to the hypervisor and is an expensive operation. Enable selective trapping of guest TLB instructions when the associated perf trace event is enabled for a specific virtual machine. Signed-off-by: Punit Agrawal Cc: Christoffer Dall Cc: Marc Zyngier --- arch/arm64/kvm/perf_trace.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/kvm/perf_trace.c b/arch/arm64/kvm/perf_trace.c index 1cafbc9..649ca55 100644 --- a/arch/arm64/kvm/perf_trace.c +++ b/arch/arm64/kvm/perf_trace.c @@ -17,6 +17,8 @@ #include #include +#include + typedef int (*perf_trace_callback_fn)(struct kvm *kvm, bool enable); struct kvm_trace_hook { @@ -24,7 +26,37 @@ struct kvm_trace_hook { perf_trace_callback_fn setup_fn; }; +static int tlb_invalidate_trap(struct kvm *kvm, bool enable) +{ + int i; + struct kvm_vcpu *vcpu; + + /* + * Halt the VM to ensure atomic update across all vcpus (this + * avoids racy behaviour against other modifications of + * HCR_EL2 such as kvm_toggle_cache/kvm_set_way_flush). + */ + kvm_arm_halt_guest(kvm); + kvm_for_each_vcpu(i, vcpu, kvm) { + unsigned long hcr = vcpu_get_hcr(vcpu); + + if (enable) + hcr |= HCR_TTLB; + else + hcr &= ~HCR_TTLB; + + vcpu_set_hcr(vcpu, hcr); + } + kvm_arm_resume_guest(kvm); + + return 0; +} + static struct kvm_trace_hook trace_hook[] = { + { + .key = "kvm_tlb_invalidate", + .setup_fn = tlb_invalidate_trap, + }, { }, }; -- 2.8.1