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* [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device
@ 2016-08-26 12:27 Deepak Kumar Jain
  2016-08-26 13:06 ` Trahe, Fiona
                   ` (2 more replies)
  0 siblings, 3 replies; 7+ messages in thread
From: Deepak Kumar Jain @ 2016-08-26 12:27 UTC (permalink / raw)
  To: fiona.trahe, john.griffin, pablo.de.lara.guarch; +Cc: dev, Deepak Kumar Jain

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 doc/guides/cryptodevs/qat.rst          | 71 ++++++++++++++++++++++++++++++++--
 drivers/crypto/qat/rte_qat_cryptodev.c |  3 ++
 2 files changed, 71 insertions(+), 3 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index f6cc1fa..21486cd 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -77,6 +77,7 @@ Limitations
 * Snow3g(UEA2) supported only if cipher length, cipher offset fields are byte-aligned.
 * Snow3g(UIA2) supported only if hash length, hash offset fields are byte-aligned.
 * No BSD support as BSD QAT kernel driver not available.
+* Snow3g (UIA2) not supported in the PMD of **Intel QuickAssist Technology C3xxx** device.
 
 
 Installation
@@ -89,13 +90,15 @@ If you are running on kernel 4.4 or greater, see instructions for
 `Installation using kernel.org driver`_ below. If you are on a kernel earlier
 than 4.4, see `Installation using 01.org QAT driver`_.
 
-For **Intel QuickAssist Technology C62x** device, kernel 4.5 or greater is
+For **Intel QuickAssist Technology C62x**  and **Intel QuickAssist Technology C3xxx**
+device, kernel 4.5 or greater is
 needed. See instructions for `instructions using kernel.org driver`_ below.
 
 
 Installation using 01.org QAT driver
 ------------------------------------
-NOTE: There is no driver available for **Intel QuickAssist Technology C62x** on 01.org.
+NOTE: There is no driver available for **Intel QuickAssist Technology C62x** and
+**Intel QuickAssist Technology C3xxx** devices on 01.org.
 
 Download the latest QuickAssist Technology Driver from `01.org
 <https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_
@@ -265,7 +268,7 @@ You should see output similar to::
     3d:00.0 Co-processor: Intel Corporation Device 37c8
     3f:00.0 Co-processor: Intel Corporation Device 37c8
 
-For each c62x device there are 3 PFs. 
+For each c62x device there are 3 PFs.
 Using the sysfs, for each PF, enable the 16 VFs::
 
     echo 16 > /sys/bus/pci/drivers/c6xx/0000\:1a\:00.0/sriov_numvfs
@@ -276,6 +279,48 @@ To verify that the VFs are available for use - use ``lspci -d:37c9`` to confirm
 the bdf of the 48 VF devices are available per ``C62x`` device.
 
 To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
+
+For **Intel QuickAssist Technology C3xxx**:
+Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
+driver to start the QAT hardware.
+
+The steps below assume you are:
+
+* Running DPDK on a platform with one ``C3xxx`` device.
+* On a kernel at least version 4.5.
+
+In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+
+Ensure the QAT driver is loaded on your system, by executing::
+
+    lsmod | grep qat
+
+You should see the following output::
+
+    qat_c3xxx               16384  0
+    intel_qat             122880  1 qat_c3xxx
+
+Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
+
+First find the bdf of the physical function (PF) of the C3xxx device
+
+    lspci -d:19e2
+
+You should see output similar to::
+
+    01:00.0 Co-processor: Intel Corporation Device 19e2
+
+For c3xxx device there is 1 PFs.
+Using the sysfs, enable the 16 VFs::
+
+    echo 16 > /sys/bus/pci/drivers/c3xxx/0000\:01\:00.0/sriov_numvfs
+
+If you get an error, it's likely you're using a QAT kernel driver earlier than kernel 4.5.
+
+To verify that the VFs are available for use - use ``lspci -d:19e3`` to confirm
+the bdf of the 16 VF devices are available per ``C3xxx`` device.
+To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
+
 Binding the available VFs to the DPDK UIO driver
 ------------------------------------------------
 
@@ -321,3 +366,23 @@ if yours are different adjust the unbind command below::
    echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
 
 You can use ``lspci -vvd:37c9`` to confirm that all devices are now in use by igb_uio kernel driver.
+
+For **Intel(R) QuickAssist Technology C3xxx** device:
+The unbind command below assumes ``bdfs`` of ``01:01.00-01:02.07``,
+if yours are different adjust the unbind command below::
+
+   cd $RTE_SDK
+   modprobe uio
+   insmod ./build/kmod/igb_uio.ko
+
+   for device in $(seq 1 2); do \
+       for fn in $(seq 0 7); do \
+           echo -n 0000:01:0${device}.${fn} > \
+           /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
+
+       done; \
+   done
+
+   echo "8086 19e3" > /sys/bus/pci/drivers/igb_uio/new_id
+
+You can use ``lspci -vvd:19e3`` to confirm that all devices are now in use by igb_uio kernel driver.
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c
index e606eb5..eb929b5 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -74,6 +74,9 @@ static struct rte_pci_id pci_id_qat_map[] = {
 		{
 			RTE_PCI_DEVICE(0x8086, 0x37c9),
 		},
+		{
+			RTE_PCI_DEVICE(0x8086, 0x19e3),
+		},
 		{.device_id = 0},
 };
 
-- 
2.5.5

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device
  2016-08-26 12:27 [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device Deepak Kumar Jain
@ 2016-08-26 13:06 ` Trahe, Fiona
  2016-09-07 18:07 ` De Lara Guarch, Pablo
  2016-09-14  9:56 ` [PATCH v2] " Deepak Kumar Jain
  2 siblings, 0 replies; 7+ messages in thread
From: Trahe, Fiona @ 2016-08-26 13:06 UTC (permalink / raw)
  To: Jain, Deepak K, Griffin, John, De Lara Guarch, Pablo; +Cc: dev, Trahe, Fiona



-----Original Message-----
From: Jain, Deepak K 
Sent: Friday, August 26, 2016 1:28 PM
To: Trahe, Fiona <fiona.trahe@intel.com>; Griffin, John <john.griffin@intel.com>; De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>
Cc: dev@dpdk.org; Jain, Deepak K <deepak.k.jain@intel.com>
Subject: [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>

Acked-by: Fiona Trahe <fiona.trahe@intel.com>

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device
  2016-08-26 12:27 [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device Deepak Kumar Jain
  2016-08-26 13:06 ` Trahe, Fiona
@ 2016-09-07 18:07 ` De Lara Guarch, Pablo
  2016-09-07 19:34   ` Jain, Deepak K
  2016-09-14  9:56 ` [PATCH v2] " Deepak Kumar Jain
  2 siblings, 1 reply; 7+ messages in thread
From: De Lara Guarch, Pablo @ 2016-09-07 18:07 UTC (permalink / raw)
  To: Jain, Deepak K, Trahe, Fiona, Griffin, John; +Cc: dev

Hi Deepak,

> -----Original Message-----
> From: Jain, Deepak K
> Sent: Friday, August 26, 2016 5:28 AM
> To: Trahe, Fiona; Griffin, John; De Lara Guarch, Pablo
> Cc: dev@dpdk.org; Jain, Deepak K
> Subject: [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device
> 
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>

Could you send a v2 with a release notes update?

Thanks,
Pablo

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device
  2016-09-07 18:07 ` De Lara Guarch, Pablo
@ 2016-09-07 19:34   ` Jain, Deepak K
  0 siblings, 0 replies; 7+ messages in thread
From: Jain, Deepak K @ 2016-09-07 19:34 UTC (permalink / raw)
  To: De Lara Guarch, Pablo, Trahe, Fiona, Griffin, John; +Cc: dev

HI Pablo,

> -----Original Message-----
> From: De Lara Guarch, Pablo
> Sent: Wednesday, September 7, 2016 7:08 PM
> To: Jain, Deepak K <deepak.k.jain@intel.com>; Trahe, Fiona
> <fiona.trahe@intel.com>; Griffin, John <john.griffin@intel.com>
> Cc: dev@dpdk.org
> Subject: RE: [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device
> 
> Hi Deepak,
> 
> > -----Original Message-----
> > From: Jain, Deepak K
> > Sent: Friday, August 26, 2016 5:28 AM
> > To: Trahe, Fiona; Griffin, John; De Lara Guarch, Pablo
> > Cc: dev@dpdk.org; Jain, Deepak K
> > Subject: [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device
> >
> > Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
> 
> Could you send a v2 with a release notes update?
> 
Agreed. I will send v2 with release notes.

> Thanks,
> Pablo

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v2] crypto/qat: add Intel(R) QuickAssist C3xxx device
  2016-08-26 12:27 [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device Deepak Kumar Jain
  2016-08-26 13:06 ` Trahe, Fiona
  2016-09-07 18:07 ` De Lara Guarch, Pablo
@ 2016-09-14  9:56 ` Deepak Kumar Jain
  2016-09-19 16:37   ` [PATCH v3] " Deepak Kumar Jain
  2 siblings, 1 reply; 7+ messages in thread
From: Deepak Kumar Jain @ 2016-09-14  9:56 UTC (permalink / raw)
  To: dev; +Cc: pablo.de.lara.guarch, Deepak Kumar JAIN

From: Deepak Kumar JAIN <deepak.k.jain@intel.com>

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
Changes in v2:
Added new feature information in release_16_11.rst file.

 doc/guides/cryptodevs/qat.rst          | 76 +++++++++++++++++++++++++++++++---
 doc/guides/rel_notes/release_16_11.rst |  3 ++
 drivers/crypto/qat/rte_qat_cryptodev.c |  3 ++
 3 files changed, 76 insertions(+), 6 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 3819e51..78cadc4 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -31,8 +31,8 @@ Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
 ==================================================
 
 The QAT PMD provides poll mode crypto driver support for **Intel QuickAssist
-Technology DH895xxC** and **Intel QuickAssist Technology C62x**
-hardware accelerator.
+Technology DH895xxC** , **Intel QuickAssist Technology C62x** and
+**Intel QuickAssist Technology C3xxx** hardware accelerator.
 
 
 Features
@@ -75,6 +75,7 @@ Limitations
 * Snow3g(UEA2) supported only if cipher length, cipher offset fields are byte-aligned.
 * Snow3g(UIA2) supported only if hash length, hash offset fields are byte-aligned.
 * No BSD support as BSD QAT kernel driver not available.
+* Snow3g (UIA2) not supported in the PMD of **Intel QuickAssist Technology C3xxx** device.
 
 
 Installation
@@ -98,14 +99,16 @@ If you are running on kernel 4.4 or greater, see instructions for
 `Installation using kernel.org driver`_ below. If you are on a kernel earlier
 than 4.4, see `Installation using 01.org QAT driver`_.
 
-For **Intel QuickAssist Technology C62x** device, kernel 4.5 or greater is
-needed. See instructions for `Installation using kernel.org driver`_ below.
+For **Intel QuickAssist Technology C62x** and **Intel QuickAssist Technology C3xxx**
+device, kernel 4.5 or greater is needed.
+See instructions for `Installation using kernel.org driver`_ below.
 
 
 Installation using 01.org QAT driver
 ------------------------------------
 
-NOTE: There is no driver available for **Intel QuickAssist Technology C62x** on 01.org.
+NOTE: There is no driver available for **Intel QuickAssist Technology C62x** and
+**Intel QuickAssist Technology C3xxx** devices on 01.org.
 
 Download the latest QuickAssist Technology Driver from `01.org
 <https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_
@@ -184,6 +187,7 @@ Installation using kernel.org driver
 ------------------------------------
 
 For **Intel QuickAssist Technology DH895xxC**:
+
 Assuming you are running on at least a 4.4 kernel, you can use the stock kernel.org QAT
 driver to start the QAT hardware.
 
@@ -242,7 +246,6 @@ cd to your linux source root directory and start the qat kernel modules:
 **Note**:The following warning in /var/log/messages can be ignored:
     ``IOMMU should be enabled for SR-IOV to work correctly``
 
-
 For **Intel QuickAssist Technology C62x**:
 Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
 driver to start the QAT hardware.
@@ -287,6 +290,47 @@ the bdf of the 48 VF devices are available per ``C62x`` device.
 
 To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
 
+For **Intel QuickAssist Technology C3xxx**:
+Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
+driver to start the QAT hardware.
+
+The steps below assume you are:
+
+* Running DPDK on a platform with one ``C3xxx`` device.
+* On a kernel at least version 4.5.
+
+In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+
+Ensure the QAT driver is loaded on your system, by executing::
+
+    lsmod | grep qat
+
+You should see the following output::
+
+    qat_c3xxx               16384  0
+    intel_qat             122880  1 qat_c3xxx
+
+Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
+
+First find the bdf of the physical function (PF) of the C3xxx device
+
+    lspci -d:19e2
+
+You should see output similar to::
+
+    01:00.0 Co-processor: Intel Corporation Device 19e2
+
+For c3xxx device there is 1 PFs.
+Using the sysfs, enable the 16 VFs::
+
+    echo 16 > /sys/bus/pci/drivers/c3xxx/0000\:01\:00.0/sriov_numvfs
+
+If you get an error, it's likely you're using a QAT kernel driver earlier than kernel 4.5.
+
+To verify that the VFs are available for use - use ``lspci -d:19e3`` to confirm
+the bdf of the 16 VF devices are available per ``C3xxx`` device.
+To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
+
 Binding the available VFs to the DPDK UIO driver
 ------------------------------------------------
 
@@ -332,3 +376,23 @@ if yours are different adjust the unbind command below::
    echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
 
 You can use ``lspci -vvd:37c9`` to confirm that all devices are now in use by igb_uio kernel driver.
+
+For **Intel(R) QuickAssist Technology C3xxx** device:
+The unbind command below assumes ``bdfs`` of ``01:01.00-01:02.07``,
+if yours are different adjust the unbind command below::
+
+   cd $RTE_SDK
+   modprobe uio
+   insmod ./build/kmod/igb_uio.ko
+
+   for device in $(seq 1 2); do \
+       for fn in $(seq 0 7); do \
+           echo -n 0000:01:0${device}.${fn} > \
+           /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
+
+       done; \
+   done
+
+   echo "8086 19e3" > /sys/bus/pci/drivers/igb_uio/new_id
+
+You can use ``lspci -vvd:19e3`` to confirm that all devices are now in use by igb_uio kernel driver.
diff --git a/doc/guides/rel_notes/release_16_11.rst b/doc/guides/rel_notes/release_16_11.rst
index 5db495e..4bc67e0 100644
--- a/doc/guides/rel_notes/release_16_11.rst
+++ b/doc/guides/rel_notes/release_16_11.rst
@@ -36,6 +36,9 @@ New Features
 
      This section is a comment. Make sure to start the actual text at the margin.
 
+* ** Added support of C3xxx Device in QAT PMD.**
+  Support for Device c3xxx has been enabled in QAT PMD.
+
 * ** Added support of C62XX Device in QAT PMD.**
   Support for Device c62xx has been enabled in QAT PMD.
 
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c
index e606eb5..eb929b5 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -74,6 +74,9 @@ static struct rte_pci_id pci_id_qat_map[] = {
 		{
 			RTE_PCI_DEVICE(0x8086, 0x37c9),
 		},
+		{
+			RTE_PCI_DEVICE(0x8086, 0x19e3),
+		},
 		{.device_id = 0},
 };
 
-- 
2.5.5

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH v3] crypto/qat: add Intel(R) QuickAssist C3xxx device
  2016-09-14  9:56 ` [PATCH v2] " Deepak Kumar Jain
@ 2016-09-19 16:37   ` Deepak Kumar Jain
  2016-09-20  0:01     ` De Lara Guarch, Pablo
  0 siblings, 1 reply; 7+ messages in thread
From: Deepak Kumar Jain @ 2016-09-19 16:37 UTC (permalink / raw)
  To: dev; +Cc: pablo.de.lara.guarch, Deepak Kumar JAIN

From: Deepak Kumar JAIN <deepak.k.jain@intel.com>

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
Changes in v3:
Updated qat.rst by removing the limitation.

Changes in v2:
Added new feature information in release_16_11.rst file.

 doc/guides/cryptodevs/qat.rst          | 76 ++++++++++++++++++++++++++++++----
 doc/guides/rel_notes/release_16_11.rst |  3 ++
 drivers/crypto/qat/rte_qat_cryptodev.c |  3 ++
 3 files changed, 75 insertions(+), 7 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 50bfc95..61bbdef 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -31,8 +31,8 @@ Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
 ==================================================
 
 The QAT PMD provides poll mode crypto driver support for **Intel QuickAssist
-Technology DH895xxC** and **Intel QuickAssist Technology C62x**
-hardware accelerator.
+Technology DH895xxC** , **Intel QuickAssist Technology C62x** and
+**Intel QuickAssist Technology C3xxx** hardware accelerator.
 
 
 Features
@@ -77,7 +77,6 @@ Limitations
 * Snow3g(UIA2) supported only if hash length, hash offset fields are byte-aligned.
 * No BSD support as BSD QAT kernel driver not available.
 
-
 Installation
 ------------
 
@@ -99,14 +98,16 @@ If you are running on kernel 4.4 or greater, see instructions for
 `Installation using kernel.org driver`_ below. If you are on a kernel earlier
 than 4.4, see `Installation using 01.org QAT driver`_.
 
-For **Intel QuickAssist Technology C62x** device, kernel 4.5 or greater is
-needed. See instructions for `Installation using kernel.org driver`_ below.
+For **Intel QuickAssist Technology C62x** and **Intel QuickAssist Technology C3xxx**
+device, kernel 4.5 or greater is needed.
+See instructions for `Installation using kernel.org driver`_ below.
 
 
 Installation using 01.org QAT driver
 ------------------------------------
 
-NOTE: There is no driver available for **Intel QuickAssist Technology C62x** on 01.org.
+NOTE: There is no driver available for **Intel QuickAssist Technology C62x** and
+**Intel QuickAssist Technology C3xxx** devices on 01.org.
 
 Download the latest QuickAssist Technology Driver from `01.org
 <https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_
@@ -185,6 +186,7 @@ Installation using kernel.org driver
 ------------------------------------
 
 For **Intel QuickAssist Technology DH895xxC**:
+
 Assuming you are running on at least a 4.4 kernel, you can use the stock kernel.org QAT
 driver to start the QAT hardware.
 
@@ -243,7 +245,6 @@ cd to your linux source root directory and start the qat kernel modules:
 **Note**:The following warning in /var/log/messages can be ignored:
     ``IOMMU should be enabled for SR-IOV to work correctly``
 
-
 For **Intel QuickAssist Technology C62x**:
 Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
 driver to start the QAT hardware.
@@ -288,6 +289,47 @@ the bdf of the 48 VF devices are available per ``C62x`` device.
 
 To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
 
+For **Intel QuickAssist Technology C3xxx**:
+Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT
+driver to start the QAT hardware.
+
+The steps below assume you are:
+
+* Running DPDK on a platform with one ``C3xxx`` device.
+* On a kernel at least version 4.5.
+
+In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+
+Ensure the QAT driver is loaded on your system, by executing::
+
+    lsmod | grep qat
+
+You should see the following output::
+
+    qat_c3xxx               16384  0
+    intel_qat             122880  1 qat_c3xxx
+
+Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
+
+First find the bdf of the physical function (PF) of the C3xxx device
+
+    lspci -d:19e2
+
+You should see output similar to::
+
+    01:00.0 Co-processor: Intel Corporation Device 19e2
+
+For c3xxx device there is 1 PFs.
+Using the sysfs, enable the 16 VFs::
+
+    echo 16 > /sys/bus/pci/drivers/c3xxx/0000\:01\:00.0/sriov_numvfs
+
+If you get an error, it's likely you're using a QAT kernel driver earlier than kernel 4.5.
+
+To verify that the VFs are available for use - use ``lspci -d:19e3`` to confirm
+the bdf of the 16 VF devices are available per ``C3xxx`` device.
+To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
+
 Binding the available VFs to the DPDK UIO driver
 ------------------------------------------------
 
@@ -333,3 +375,23 @@ if yours are different adjust the unbind command below::
    echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
 
 You can use ``lspci -vvd:37c9`` to confirm that all devices are now in use by igb_uio kernel driver.
+
+For **Intel(R) QuickAssist Technology C3xxx** device:
+The unbind command below assumes ``bdfs`` of ``01:01.00-01:02.07``,
+if yours are different adjust the unbind command below::
+
+   cd $RTE_SDK
+   modprobe uio
+   insmod ./build/kmod/igb_uio.ko
+
+   for device in $(seq 1 2); do \
+       for fn in $(seq 0 7); do \
+           echo -n 0000:01:0${device}.${fn} > \
+           /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
+
+       done; \
+   done
+
+   echo "8086 19e3" > /sys/bus/pci/drivers/igb_uio/new_id
+
+You can use ``lspci -vvd:19e3`` to confirm that all devices are now in use by igb_uio kernel driver.
diff --git a/doc/guides/rel_notes/release_16_11.rst b/doc/guides/rel_notes/release_16_11.rst
index 5db495e..4bc67e0 100644
--- a/doc/guides/rel_notes/release_16_11.rst
+++ b/doc/guides/rel_notes/release_16_11.rst
@@ -36,6 +36,9 @@ New Features
 
      This section is a comment. Make sure to start the actual text at the margin.
 
+* ** Added support of C3xxx Device in QAT PMD.**
+  Support for Device c3xxx has been enabled in QAT PMD.
+
 * ** Added support of C62XX Device in QAT PMD.**
   Support for Device c62xx has been enabled in QAT PMD.
 
diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c
index e606eb5..eb929b5 100644
--- a/drivers/crypto/qat/rte_qat_cryptodev.c
+++ b/drivers/crypto/qat/rte_qat_cryptodev.c
@@ -74,6 +74,9 @@ static struct rte_pci_id pci_id_qat_map[] = {
 		{
 			RTE_PCI_DEVICE(0x8086, 0x37c9),
 		},
+		{
+			RTE_PCI_DEVICE(0x8086, 0x19e3),
+		},
 		{.device_id = 0},
 };
 
-- 
2.4.11

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH v3] crypto/qat: add Intel(R) QuickAssist C3xxx device
  2016-09-19 16:37   ` [PATCH v3] " Deepak Kumar Jain
@ 2016-09-20  0:01     ` De Lara Guarch, Pablo
  0 siblings, 0 replies; 7+ messages in thread
From: De Lara Guarch, Pablo @ 2016-09-20  0:01 UTC (permalink / raw)
  To: Jain, Deepak K, dev



> -----Original Message-----
> From: Jain, Deepak K
> Sent: Monday, September 19, 2016 9:37 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo; Jain, Deepak K
> Subject: [PATCH v3] crypto/qat: add Intel(R) QuickAssist C3xxx device
> 
> From: Deepak Kumar JAIN <deepak.k.jain@intel.com>
> 
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
> Acked-by: Fiona Trahe <fiona.trahe@intel.com>

Applied to dpdk-next-crypto.
Thanks,

Pablo

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2016-09-20  0:01 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-08-26 12:27 [PATCH] crypto/qat: add Intel(R) QuickAssist C3xxx device Deepak Kumar Jain
2016-08-26 13:06 ` Trahe, Fiona
2016-09-07 18:07 ` De Lara Guarch, Pablo
2016-09-07 19:34   ` Jain, Deepak K
2016-09-14  9:56 ` [PATCH v2] " Deepak Kumar Jain
2016-09-19 16:37   ` [PATCH v3] " Deepak Kumar Jain
2016-09-20  0:01     ` De Lara Guarch, Pablo

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