[PATCH 1/3] amdgpu: Fix amdgpu_va_handle typedef not to hide pointer type

[Edward O'Callaghan <funfunctor-dczkZgxz+BNUPWh3PAxdjQ@public.gmane.org>]

Fundamentally this change stops us hiding the following pointer
type behind a typedef:

 -typedef struct amdgpu_va *amdgpu_va_handle;
 +typedef struct amdgpu_va amdgpu_va_handle_t;

Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
---
 amdgpu/amdgpu.h            |  6 +++---
 amdgpu/amdgpu_vamgr.c      |  4 ++--
 tests/amdgpu/amdgpu_test.h | 10 +++++-----
 tests/amdgpu/basic_tests.c | 20 ++++++++++----------
 tests/amdgpu/bo_tests.c    |  2 +-
 tests/amdgpu/cs_tests.c    | 10 +++++-----
 tests/amdgpu/vce_tests.c   |  6 +++---
 7 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 5d5a2c6..f322497 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -122,7 +122,7 @@ typedef struct amdgpu_bo_list *amdgpu_bo_list_handle;
 /**
  * Define handle to be used to work with VA allocated ranges
  */
-typedef struct amdgpu_va *amdgpu_va_handle;
+typedef struct amdgpu_va amdgpu_va_handle_t;
 
 /**
  * Define handle for semaphore
@@ -1126,7 +1126,7 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
 			   uint64_t va_base_alignment,
 			   uint64_t va_base_required,
 			   uint64_t *va_base_allocated,
-			   amdgpu_va_handle *va_range_handle,
+			   amdgpu_va_handle_t ** va_range_handle,
 			   uint64_t flags);
 
 /**
@@ -1140,7 +1140,7 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
  * <0 - Negative POSIX Error code
  *
 */
-int amdgpu_va_range_free(amdgpu_va_handle va_range_handle);
+int amdgpu_va_range_free(amdgpu_va_handle_t * va_range_handle);
 
 /**
 * Query virtual address range
diff --git a/amdgpu/amdgpu_vamgr.c b/amdgpu/amdgpu_vamgr.c
index 8a707cb..7fae7cf 100644
--- a/amdgpu/amdgpu_vamgr.c
+++ b/amdgpu/amdgpu_vamgr.c
@@ -230,7 +230,7 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
 			  uint64_t va_base_alignment,
 			  uint64_t va_base_required,
 			  uint64_t *va_base_allocated,
-			  amdgpu_va_handle *va_range_handle,
+			  amdgpu_va_handle_t ** va_range_handle,
 			  uint64_t flags)
 {
 	struct amdgpu_bo_va_mgr *vamgr;
@@ -274,7 +274,7 @@ int amdgpu_va_range_alloc(amdgpu_device_handle dev,
 	return 0;
 }
 
-int amdgpu_va_range_free(amdgpu_va_handle va_range_handle)
+int amdgpu_va_range_free(amdgpu_va_handle_t * va_range_handle)
 {
 	if(!va_range_handle || !va_range_handle->address)
 		return 0;
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index fca92ad..acf3359 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -111,7 +111,7 @@ static inline amdgpu_bo_handle gpu_mem_alloc(
 					uint32_t type,
 					uint64_t flags,
 					uint64_t *vmc_addr,
-					amdgpu_va_handle *va_handle)
+					amdgpu_va_handle_t ** va_handle)
 {
 	struct amdgpu_bo_alloc_request req = {0};
 	amdgpu_bo_handle buf_handle;
@@ -140,7 +140,7 @@ static inline amdgpu_bo_handle gpu_mem_alloc(
 }
 
 static inline int gpu_mem_free(amdgpu_bo_handle bo,
-			       amdgpu_va_handle va_handle,
+			       amdgpu_va_handle_t * va_handle,
 			       uint64_t vmc_addr,
 			       uint64_t size)
 {
@@ -162,11 +162,11 @@ static inline int
 amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size,
 			unsigned alignment, unsigned heap, uint64_t flags,
 			amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address,
-			amdgpu_va_handle *va_handle)
+			amdgpu_va_handle_t ** va_handle)
 {
 	struct amdgpu_bo_alloc_request request = {};
 	amdgpu_bo_handle buf_handle;
-	amdgpu_va_handle handle;
+	amdgpu_va_handle_t * handle;
 	uint64_t vmc_addr;
 	int r;
 
@@ -212,7 +212,7 @@ error_va_alloc:
 }
 
 static inline int
-amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle,
+amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle_t * va_handle,
 			 uint64_t mc_addr, uint64_t size)
 {
 	amdgpu_bo_cpu_unmap(bo);
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 11f6a63..40e9ef1 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -237,7 +237,7 @@ static void amdgpu_query_info_test(void)
 static void amdgpu_memory_alloc(void)
 {
 	amdgpu_bo_handle bo;
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 	uint64_t bo_mc;
 	int r;
 
@@ -293,7 +293,7 @@ static void amdgpu_command_submission_gfx_separate_ibs(void)
 	uint32_t *ptr;
 	uint32_t expired;
 	amdgpu_bo_list_handle bo_list;
-	amdgpu_va_handle va_handle, va_handle_ce;
+	amdgpu_va_handle_t * va_handle, va_handle_ce;
 	int r;
 
 	r = amdgpu_cs_ctx_create(device_handle, &context_handle);
@@ -382,7 +382,7 @@ static void amdgpu_command_submission_gfx_shared_ib(void)
 	uint32_t *ptr;
 	uint32_t expired;
 	amdgpu_bo_list_handle bo_list;
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 	int r;
 
 	r = amdgpu_cs_ctx_create(device_handle, &context_handle);
@@ -489,7 +489,7 @@ static void amdgpu_semaphore_test(void)
 	uint32_t *ptr;
 	uint32_t expired;
 	amdgpu_bo_list_handle bo_list[2];
-	amdgpu_va_handle va_handle[2];
+	amdgpu_va_handle_t * va_handle[2];
 	int r, i;
 
 	r = amdgpu_cs_create_semaphore(&sem);
@@ -619,7 +619,7 @@ static void amdgpu_command_submission_compute_nop(void)
 	uint32_t expired;
 	int i, r, instance;
 	amdgpu_bo_list_handle bo_list;
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 
 	r = amdgpu_cs_ctx_create(device_handle, &context_handle);
 	CU_ASSERT_EQUAL(r, 0);
@@ -725,7 +725,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle,
 	uint64_t ib_result_mc_address;
 	struct amdgpu_cs_fence fence_status = {0};
 	amdgpu_bo_handle *all_res = alloca(sizeof(resources[0]) * (res_cnt + 1));
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 
 	/* prepare CS */
 	CU_ASSERT_NOT_EQUAL(pm4_src, NULL);
@@ -802,7 +802,7 @@ static void amdgpu_command_submission_write_linear_helper(unsigned ip_type)
 	volatile uint32_t *bo_cpu;
 	int i, j, r, loop;
 	uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 
 	pm4 = calloc(pm4_dw, sizeof(*pm4));
 	CU_ASSERT_NOT_EQUAL(pm4, NULL);
@@ -903,7 +903,7 @@ static void amdgpu_command_submission_const_fill_helper(unsigned ip_type)
 	volatile uint32_t *bo_cpu;
 	int i, j, r, loop;
 	uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 
 	pm4 = calloc(pm4_dw, sizeof(*pm4));
 	CU_ASSERT_NOT_EQUAL(pm4, NULL);
@@ -1006,7 +1006,7 @@ static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type)
 	volatile unsigned char *bo1_cpu, *bo2_cpu;
 	int i, j, r, loop1, loop2;
 	uint64_t gtt_flags[2] = {0, AMDGPU_GEM_CREATE_CPU_GTT_USWC};
-	amdgpu_va_handle bo1_va_handle, bo2_va_handle;
+	amdgpu_va_handle_t * bo1_va_handle, bo2_va_handle;
 
 	pm4 = calloc(pm4_dw, sizeof(*pm4));
 	CU_ASSERT_NOT_EQUAL(pm4, NULL);
@@ -1136,7 +1136,7 @@ static void amdgpu_userptr_test(void)
 	struct amdgpu_cs_ib_info *ib_info;
 	struct amdgpu_cs_request *ibs_request;
 	amdgpu_bo_handle buf_handle;
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 
 	pm4 = calloc(pm4_dw, sizeof(*pm4));
 	CU_ASSERT_NOT_EQUAL(pm4, NULL);
diff --git a/tests/amdgpu/bo_tests.c b/tests/amdgpu/bo_tests.c
index 993895d..d1e5c22 100644
--- a/tests/amdgpu/bo_tests.c
+++ b/tests/amdgpu/bo_tests.c
@@ -41,7 +41,7 @@ static uint32_t minor_version;
 
 static amdgpu_bo_handle buffer_handle;
 static uint64_t virtual_mc_base_address;
-static amdgpu_va_handle va_handle;
+static amdgpu_va_handle_t * va_handle;
 
 static void amdgpu_bo_export_import(void);
 static void amdgpu_bo_metadata(void);
diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c
index a01ee48..d774007 100644
--- a/tests/amdgpu/cs_tests.c
+++ b/tests/amdgpu/cs_tests.c
@@ -50,7 +50,7 @@ static amdgpu_context_handle context_handle;
 static amdgpu_bo_handle ib_handle;
 static uint64_t ib_mc_address;
 static uint32_t *ib_cpu;
-static amdgpu_va_handle ib_va_handle;
+static amdgpu_va_handle_t * ib_va_handle;
 
 static amdgpu_bo_handle resources[MAX_RESOURCES];
 static unsigned num_resources;
@@ -71,7 +71,7 @@ int suite_cs_tests_init(void)
 	amdgpu_bo_handle ib_result_handle;
 	void *ib_result_cpu;
 	uint64_t ib_result_mc_address;
-	amdgpu_va_handle ib_result_va_handle;
+	amdgpu_va_handle_t * ib_result_va_handle;
 	int r;
 
 	r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
@@ -182,7 +182,7 @@ static void amdgpu_cs_uvd_create(void)
 	struct amdgpu_bo_alloc_request req = {0};
 	amdgpu_bo_handle buf_handle;
 	uint64_t va = 0;
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 	void *msg;
 	int i, r;
 
@@ -248,7 +248,7 @@ static void amdgpu_cs_uvd_decode(void)
 	uint64_t msg_addr, fb_addr, bs_addr, dpb_addr, ctx_addr, dt_addr, it_addr;
 	struct amdgpu_bo_alloc_request req = {0};
 	amdgpu_bo_handle buf_handle;
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 	uint64_t va = 0;
 	uint64_t sum;
 	uint8_t *ptr;
@@ -377,7 +377,7 @@ static void amdgpu_cs_uvd_destroy(void)
 {
 	struct amdgpu_bo_alloc_request req = {0};
 	amdgpu_bo_handle buf_handle;
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 	uint64_t va = 0;
 	void *msg;
 	int i, r;
diff --git a/tests/amdgpu/vce_tests.c b/tests/amdgpu/vce_tests.c
index 4915170..4dcd801 100644
--- a/tests/amdgpu/vce_tests.c
+++ b/tests/amdgpu/vce_tests.c
@@ -44,7 +44,7 @@
 
 struct amdgpu_vce_bo {
 	amdgpu_bo_handle handle;
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 	uint64_t addr;
 	uint64_t size;
 	uint8_t *ptr;
@@ -69,7 +69,7 @@ static uint32_t vce_harvest_config;
 
 static amdgpu_context_handle context_handle;
 static amdgpu_bo_handle ib_handle;
-static amdgpu_va_handle ib_va_handle;
+static amdgpu_va_handle_t * ib_va_handle;
 static uint64_t ib_mc_address;
 static uint32_t *ib_cpu;
 
@@ -183,7 +183,7 @@ static void alloc_resource(struct amdgpu_vce_bo *vce_bo, unsigned size, unsigned
 {
 	struct amdgpu_bo_alloc_request req = {0};
 	amdgpu_bo_handle buf_handle;
-	amdgpu_va_handle va_handle;
+	amdgpu_va_handle_t * va_handle;
 	uint64_t va = 0;
 	int r;
 
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx