From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935277AbcISMvz (ORCPT ); Mon, 19 Sep 2016 08:51:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36336 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755740AbcISMvr (ORCPT ); Mon, 19 Sep 2016 08:51:47 -0400 From: Prarit Bhargava To: linux-kernel@vger.kernel.org Cc: Prarit Bhargava , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Rafael Aquini , "Peter Zijlstra (Intel)" , Andy Lutomirski , Len Brown , lenb@kernel.org Subject: [PATCH 0/2 v2] x86/tsc: Update tsc crystal_khz whitelist Date: Mon, 19 Sep 2016 08:51:39 -0400 Message-Id: <1474289501-31717-1-git-send-email-prarit@redhat.com> X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 19 Sep 2016 12:51:46 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org native_calibrate_tsc() contains a whitelist of models that have a known TSC frequency that differs from the CPU frequency. This patchset switches the code from using magic numbers to using the defines in asm/intel-family.h and adds new processors to the whitelist. v2: peterz, fixed typo in patch 0002. There was some question if the value was supposed to be 25000 or 24000. Experimenting on an 0x55 processor shows that 25000 is correct. Signed-off-by: Prarit Bhargava Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: x86@kernel.org Cc: Rafael Aquini Cc: "Peter Zijlstra (Intel)" Cc: Andy Lutomirski Cc: Len Brown Cc: lenb@kernel.org Prarit Bhargava (2): x86,tsc: Use cpu id defines from intel-family.h x86/tsc: Add additional Intel CPU models to crystal_khz whitelist arch/x86/kernel/tsc.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) -- 1.7.9.3