From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dario Faggioli Subject: Re: [RFC 0/5] xen/arm: support big.little SoC Date: Thu, 22 Sep 2016 18:26:00 +0200 Message-ID: <1474561560.4393.389.camel@citrix.com> References: <61196660-df7c-7324-2fb6-cfb11f44ea1e@arm.com> <39623498-bb30-4ff7-f075-219487a5afbb@arm.com> <6bd7d587-f9ba-c3bf-db96-46a2958d9e5b@arm.com> <1ae3ca04-2fdd-531f-7cb1-0b3ab80feccb@arm.com> <20160922064928.GB19448@linux-u7w5.ap.freescale.net> <1474534223.4393.320.camel@citrix.com> <20160922100550.GA22467@linux-u7w5.ap.freescale.net> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============3927078305801329955==" Return-path: In-Reply-To: <20160922100550.GA22467@linux-u7w5.ap.freescale.net> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" To: Peng Fan Cc: Juergen Gross , Peng Fan , Stefano Stabellini , Steve Capper , George Dunlap , Andrew Cooper , Punit Agrawal , George Dunlap , "xen-devel@lists.xen.org" , Julien Grall , Jan Beulich List-Id: xen-devel@lists.xenproject.org --===============3927078305801329955== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="=-6jLAf6w3C67n/hIONgFK" --=-6jLAf6w3C67n/hIONgFK Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2016-09-22 at 18:05 +0800, Peng Fan wrote: > On Thu, Sep 22, 2016 at 10:50:23AM +0200, Dario Faggioli wrote: > > Yes (or I should say, "whatever", as I know nothing about all > > this! :-P) >=20 > One more thing I'd like to ask, do you prefer cpu classes to be ARM > specific or ARM/X86 > common? >=20 I'm not sure. I'd say that it depends on where we are. I mean, in Xen, names can be rather specific, like some codename of the chip/core/family/etc. I'm not sure what this means for you, on ARM, but I guess it would depend on what you, Julien and Stefano will come up and agree on. Then, at the toolstack level (xl and libxl) we can have aliases for the various classes, and/or names for specific group of classes, arranged according whatever criteria. I also like George's idea of allowing to pick a class by its order in the hypervisor hierarchy, if/as soon as we'll put classes in a hierarchy withing the hypervisor. But I'd like to hear others... In the meanwhile, if I were you, I'd start with either "class 0", "class 1", etc., or just use the codename of the chip ("A17, "A15", etc.) Regards, Dario --=20 <> (Raistlin Majere) ----------------------------------------------------------------- Dario Faggioli, Ph.D, http://about.me/dario.faggioli Senior Software Engineer, Citrix Systems R&D Ltd., Cambridge (UK) --=-6jLAf6w3C67n/hIONgFK Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJX5AYZAAoJEBZCeImluHPujhQQANXnJowWj5ZLbh3THdBCC45S vjLVsexO1wveGkK2G3kASnV3ns1LLR/69tGZ1NoNTJr2S4uu0j8tky9lAXoNyFST BcBrJeXLf79v5MV2NVwKn4Qse4yigagdZRHo+fdBEtEPG+14jW+WhetXo9GCHQvm lKzX7yT4WZTSWlR358DOUiAZ8BQ3i7ZyIFPnv+7IsTbAe2Snq6h5NYn0HNz/QshE sOcTsDvmjLfiw6qojuJZ/oHt+RN1/VeoaIIapqUP0bnefp8wA2VSxq80SqaIU2x0 NrDZICJ0MHtf3U8PoeMVvjTT+lyzvrSzY1YudeJR+DZpGJuVFQ1Fu4sht2X/inpX mW9sM7eJXowAcm++NK8BUEw+5W37PszugWdvwBSiqyZpFwekY3tBNSRt7q7e+dFx CuvXPOpvpHlW2XOubNQJiam5HG0SRVfb/Erveb0oU68ClcbdRiARTUgPuo7ltVZc m9It4voEJw9C0Fzg99hRWsbz/RynktQhI4AllKCSAWipVunOGRJIuBxwL+nRbda3 813mDvs8cEhYi6yQphUqRnZsBZDKl4IRd4pSUzjhY6QRQmBp8A2yfEWBljjh0AS1 +uMIj/JeeJWCddR9SzfqoU6px3mXuvnmtti/J8fGLDuOZFuJBtfpyNZTzpkJBEB2 NrM31MX1Y8zxZ8QwPf65 =mRrS -----END PGP SIGNATURE----- --=-6jLAf6w3C67n/hIONgFK-- --===============3927078305801329955== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KWGVuLWRldmVs IG1haWxpbmcgbGlzdApYZW4tZGV2ZWxAbGlzdHMueGVuLm9yZwpodHRwczovL2xpc3RzLnhlbi5v cmcveGVuLWRldmVsCg== --===============3927078305801329955==--