From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com ([134.134.136.20]:13657 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1034494AbcIVVAu (ORCPT ); Thu, 22 Sep 2016 17:00:50 -0400 From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni , stable@vger.kernel.org, Vandana Kannan Subject: [PATCH 4/9] drm/i915/gen9: fix the WaWmMemoryReadLatency implementation Date: Thu, 22 Sep 2016 18:00:30 -0300 Message-Id: <1474578035-424-5-git-send-email-paulo.r.zanoni@intel.com> In-Reply-To: <1474578035-424-1-git-send-email-paulo.r.zanoni@intel.com> References: <1474578035-424-1-git-send-email-paulo.r.zanoni@intel.com> Sender: stable-owner@vger.kernel.org List-ID: Bspec says: "The mailbox response data may not account for memory read latency. If the mailbox response data for level 0 is 0us, add 2 microseconds to the result for each valid level." This means we should only do the +2 in case wm[0] == 0, not always. So split the sanitizing implementation from the WA implementation and fix the WA implementation. v2: Add Fixes tag (Maarten). Fixes: 367294be7c25 ("drm/i915/gen9: Add 2us read latency to WM level") Cc: stable@vger.kernel.org Cc: Vandana Kannan Reviewed-by: Maarten Lankhorst Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_pm.c | 42 +++++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f09d912..ee561c2 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2127,32 +2127,34 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[8]) GEN9_MEM_LATENCY_LEVEL_MASK; /* + * If a level n (n > 1) has a 0us latency, all levels m (m >= n) + * need to be disabled. We make sure to sanitize the values out + * of the punit to satisfy this requirement. + */ + for (level = 1; level <= max_level; level++) { + if (wm[level] == 0) { + for (i = level + 1; i <= max_level; i++) + wm[i] = 0; + break; + } + } + + /* * WaWmMemoryReadLatency:skl * * punit doesn't take into account the read latency so we need - * to add 2us to the various latency levels we retrieve from - * the punit. - * - W0 is a bit special in that it's the only level that - * can't be disabled if we want to have display working, so - * we always add 2us there. - * - For levels >=1, punit returns 0us latency when they are - * disabled, so we respect that and don't add 2us then - * - * Additionally, if a level n (n > 1) has a 0us latency, all - * levels m (m >= n) need to be disabled. We make sure to - * sanitize the values out of the punit to satisfy this - * requirement. + * to add 2us to the various latency levels we retrieve from the + * punit when level 0 response data us 0us. */ - wm[0] += 2; - for (level = 1; level <= max_level; level++) - if (wm[level] != 0) + if (wm[0] == 0) { + wm[0] += 2; + for (level = 1; level <= max_level; level++) { + if (wm[level] == 0) + break; wm[level] += 2; - else { - for (i = level + 1; i <= max_level; i++) - wm[i] = 0; - - break; } + } + } else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) { uint64_t sskpd = I915_READ64(MCH_SSKPD); -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paulo Zanoni Subject: [PATCH 4/9] drm/i915/gen9: fix the WaWmMemoryReadLatency implementation Date: Thu, 22 Sep 2016 18:00:30 -0300 Message-ID: <1474578035-424-5-git-send-email-paulo.r.zanoni@intel.com> References: <1474578035-424-1-git-send-email-paulo.r.zanoni@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7D4EF6E979 for ; Thu, 22 Sep 2016 21:00:49 +0000 (UTC) In-Reply-To: <1474578035-424-1-git-send-email-paulo.r.zanoni@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: Paulo Zanoni , stable@vger.kernel.org, Vandana Kannan List-Id: intel-gfx@lists.freedesktop.org QnNwZWMgc2F5czoKICAiVGhlIG1haWxib3ggcmVzcG9uc2UgZGF0YSBtYXkgbm90IGFjY291bnQg Zm9yIG1lbW9yeSByZWFkIGxhdGVuY3kuCiAgIElmIHRoZSBtYWlsYm94IHJlc3BvbnNlIGRhdGEg Zm9yIGxldmVsIDAgaXMgMHVzLCBhZGQgMiBtaWNyb3NlY29uZHMKICAgdG8gdGhlIHJlc3VsdCBm b3IgZWFjaCB2YWxpZCBsZXZlbC4iCgpUaGlzIG1lYW5zIHdlIHNob3VsZCBvbmx5IGRvIHRoZSAr MiBpbiBjYXNlIHdtWzBdID09IDAsIG5vdCBhbHdheXMuCgpTbyBzcGxpdCB0aGUgc2FuaXRpemlu ZyBpbXBsZW1lbnRhdGlvbiBmcm9tIHRoZSBXQSBpbXBsZW1lbnRhdGlvbiBhbmQKZml4IHRoZSBX QSBpbXBsZW1lbnRhdGlvbi4KCnYyOiBBZGQgRml4ZXMgdGFnIChNYWFydGVuKS4KCkZpeGVzOiAz NjcyOTRiZTdjMjUgKCJkcm0vaTkxNS9nZW45OiBBZGQgMnVzIHJlYWQgbGF0ZW5jeSB0byBXTSBs ZXZlbCIpCkNjOiBzdGFibGVAdmdlci5rZXJuZWwub3JnCkNjOiBWYW5kYW5hIEthbm5hbiA8dmFu ZGFuYS5rYW5uYW5AaW50ZWwuY29tPgpSZXZpZXdlZC1ieTogTWFhcnRlbiBMYW5raG9yc3QgPG1h YXJ0ZW4ubGFua2hvcnN0QGxpbnV4LmludGVsLmNvbT4KU2lnbmVkLW9mZi1ieTogUGF1bG8gWmFu b25pIDxwYXVsby5yLnphbm9uaUBpbnRlbC5jb20+Ci0tLQogZHJpdmVycy9ncHUvZHJtL2k5MTUv aW50ZWxfcG0uYyB8IDQyICsrKysrKysrKysrKysrKysrKysrKy0tLS0tLS0tLS0tLS0tLS0tLS0t CiAxIGZpbGUgY2hhbmdlZCwgMjIgaW5zZXJ0aW9ucygrKSwgMjAgZGVsZXRpb25zKC0pCgpkaWZm IC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfcG0uYyBiL2RyaXZlcnMvZ3B1L2Ry bS9pOTE1L2ludGVsX3BtLmMKaW5kZXggZjA5ZDkxMi4uZWU1NjFjMiAxMDA2NDQKLS0tIGEvZHJp dmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfcG0uYworKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9p bnRlbF9wbS5jCkBAIC0yMTI3LDMyICsyMTI3LDM0IEBAIHN0YXRpYyB2b2lkIGludGVsX3JlYWRf d21fbGF0ZW5jeShzdHJ1Y3QgZHJtX2RldmljZSAqZGV2LCB1aW50MTZfdCB3bVs4XSkKIAkJCQlH RU45X01FTV9MQVRFTkNZX0xFVkVMX01BU0s7CiAKIAkJLyoKKwkJICogSWYgYSBsZXZlbCBuIChu ID4gMSkgaGFzIGEgMHVzIGxhdGVuY3ksIGFsbCBsZXZlbHMgbSAobSA+PSBuKQorCQkgKiBuZWVk IHRvIGJlIGRpc2FibGVkLiBXZSBtYWtlIHN1cmUgdG8gc2FuaXRpemUgdGhlIHZhbHVlcyBvdXQK KwkJICogb2YgdGhlIHB1bml0IHRvIHNhdGlzZnkgdGhpcyByZXF1aXJlbWVudC4KKwkJICovCisJ CWZvciAobGV2ZWwgPSAxOyBsZXZlbCA8PSBtYXhfbGV2ZWw7IGxldmVsKyspIHsKKwkJCWlmICh3 bVtsZXZlbF0gPT0gMCkgeworCQkJCWZvciAoaSA9IGxldmVsICsgMTsgaSA8PSBtYXhfbGV2ZWw7 IGkrKykKKwkJCQkJd21baV0gPSAwOworCQkJCWJyZWFrOworCQkJfQorCQl9CisKKwkJLyoKIAkJ ICogV2FXbU1lbW9yeVJlYWRMYXRlbmN5OnNrbAogCQkgKgogCQkgKiBwdW5pdCBkb2Vzbid0IHRh a2UgaW50byBhY2NvdW50IHRoZSByZWFkIGxhdGVuY3kgc28gd2UgbmVlZAotCQkgKiB0byBhZGQg MnVzIHRvIHRoZSB2YXJpb3VzIGxhdGVuY3kgbGV2ZWxzIHdlIHJldHJpZXZlIGZyb20KLQkJICog dGhlIHB1bml0LgotCQkgKiAgIC0gVzAgaXMgYSBiaXQgc3BlY2lhbCBpbiB0aGF0IGl0J3MgdGhl IG9ubHkgbGV2ZWwgdGhhdAotCQkgKiAgIGNhbid0IGJlIGRpc2FibGVkIGlmIHdlIHdhbnQgdG8g aGF2ZSBkaXNwbGF5IHdvcmtpbmcsIHNvCi0JCSAqICAgd2UgYWx3YXlzIGFkZCAydXMgdGhlcmUu Ci0JCSAqICAgLSBGb3IgbGV2ZWxzID49MSwgcHVuaXQgcmV0dXJucyAwdXMgbGF0ZW5jeSB3aGVu IHRoZXkgYXJlCi0JCSAqICAgZGlzYWJsZWQsIHNvIHdlIHJlc3BlY3QgdGhhdCBhbmQgZG9uJ3Qg YWRkIDJ1cyB0aGVuCi0JCSAqCi0JCSAqIEFkZGl0aW9uYWxseSwgaWYgYSBsZXZlbCBuIChuID4g MSkgaGFzIGEgMHVzIGxhdGVuY3ksIGFsbAotCQkgKiBsZXZlbHMgbSAobSA+PSBuKSBuZWVkIHRv IGJlIGRpc2FibGVkLiBXZSBtYWtlIHN1cmUgdG8KLQkJICogc2FuaXRpemUgdGhlIHZhbHVlcyBv dXQgb2YgdGhlIHB1bml0IHRvIHNhdGlzZnkgdGhpcwotCQkgKiByZXF1aXJlbWVudC4KKwkJICog dG8gYWRkIDJ1cyB0byB0aGUgdmFyaW91cyBsYXRlbmN5IGxldmVscyB3ZSByZXRyaWV2ZSBmcm9t IHRoZQorCQkgKiBwdW5pdCB3aGVuIGxldmVsIDAgcmVzcG9uc2UgZGF0YSB1cyAwdXMuCiAJCSAq LwotCQl3bVswXSArPSAyOwotCQlmb3IgKGxldmVsID0gMTsgbGV2ZWwgPD0gbWF4X2xldmVsOyBs ZXZlbCsrKQotCQkJaWYgKHdtW2xldmVsXSAhPSAwKQorCQlpZiAod21bMF0gPT0gMCkgeworCQkJ d21bMF0gKz0gMjsKKwkJCWZvciAobGV2ZWwgPSAxOyBsZXZlbCA8PSBtYXhfbGV2ZWw7IGxldmVs KyspIHsKKwkJCQlpZiAod21bbGV2ZWxdID09IDApCisJCQkJCWJyZWFrOwogCQkJCXdtW2xldmVs XSArPSAyOwotCQkJZWxzZSB7Ci0JCQkJZm9yIChpID0gbGV2ZWwgKyAxOyBpIDw9IG1heF9sZXZl bDsgaSsrKQotCQkJCQl3bVtpXSA9IDA7Ci0KLQkJCQlicmVhazsKIAkJCX0KKwkJfQorCiAJfSBl bHNlIGlmIChJU19IQVNXRUxMKGRldikgfHwgSVNfQlJPQURXRUxMKGRldikpIHsKIAkJdWludDY0 X3Qgc3NrcGQgPSBJOTE1X1JFQUQ2NChNQ0hfU1NLUEQpOwogCi0tIAoyLjcuNAoKX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcg bGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==