From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43632) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bq2sr-0002kM-HI for qemu-devel@nongnu.org; Fri, 30 Sep 2016 14:50:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bq2sm-00031w-Pn for qemu-devel@nongnu.org; Fri, 30 Sep 2016 14:50:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44580) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bq2sm-00031h-EF for qemu-devel@nongnu.org; Fri, 30 Sep 2016 14:50:04 -0400 From: Eduardo Habkost Date: Fri, 30 Sep 2016 15:49:34 -0300 Message-Id: <1475261386-20211-1-git-send-email-ehabkost@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v5 00/12] Add runnability info to query-cpu-definitions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: dahi@linux.vnet.ibm.com, Paolo Bonzini , Igor Mammedov , Jiri Denemark , Markus Armbruster , Richard Henderson , libvir-list@redhat.com, Michael Mueller , Christian Borntraeger , Cornelia Huck This series extends query-cpu-definitions to include an extra field: "unavailable-features". The new field can be used to find out reasons that prevent the CPU model from running in the current host. This will return information based on the current machine and accelerator only. In the future we may extend these mechanisms to allow querying other machines and other accelerators without restarting QEMU, but it will require some reorganization of QEMU's main code. To be able to implement this more cleanly, the series rework some of the feature/property name code. This series can be seen in the git branch at: https://github.com/ehabkost/qemu-hacks.git work/query-cpu-definitions-r= unnable-info The series is based on my x86-next branch: https://github.com/ehabkost/qemu.git x86-next Changes v4 -> v5: * New patch: "target-i386: Register aliases for feature names with unders= cores" * On patch: "tests: Add test case for x86 feature parsing compatibility": * Fix typo on commit message Reported-by: Jonathan Neusch=C3=A4fer * Add comment noting that the "[+-]feature" compatibility mode will be removed soon * On patch: "target-i386: Make plus_features/minus_features QOM-based": * Removed feat2prop() call on , as we now have property aliases for the old names containing underscores * On patch: "target-i386: Remove underscores from feat_names arrays": * Remove the feat2prop() call from the alias registration loop, too * Commit message update to enumerate all code that uses feat_names * On patch: "target-i386: x86_cpu_load_features() function": * Fix typo on x86_cpu_load_features() comment Reported-by: Paolo Bonzini Diff v4 ->v5: diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 4dd3aee..620889f 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2002,12 +2002,10 @@ static void x86_cpu_parse_featurestr(const char= *typename, char *features, /* Compatibility syntax: */ if (featurestr[0] =3D=3D '+') { - feat2prop(featurestr + 1); plus_features =3D g_list_append(plus_features, g_strdup(featurestr + 1)); continue; } else if (featurestr[0] =3D=3D '-') { - feat2prop(featurestr + 1); minus_features =3D g_list_append(minus_features, g_strdup(featurestr + 1)); continue; @@ -3066,8 +3064,7 @@ static void x86_cpu_enable_xsave_components(X86CP= U *cpu) env->features[FEAT_XSAVE_COMP_HI] =3D mask >> 32; } -/* Load CPUID data based on configureured features - */ +/* Load CPUID data based on configured features */ static void x86_cpu_load_features(X86CPU *cpu, Error **errp) { CPUX86State *env =3D &cpu->env; @@ -3443,7 +3440,10 @@ static void x86_cpu_register_feature_bit_props(X= 86CPU *cpu, return; } - /* Property names should use "-" instead of "_" */ + /* Property names should use "-" instead of "_". + * Old names containing underscores are registered as aliases + * using object_property_add_alias() + */ assert(!strchr(name, '_')); /* aliases don't use "|" delimiters anymore, they are registered * manually using object_property_add_alias() */ @@ -3496,7 +3496,6 @@ static void x86_cpu_initfn(Object *obj) } } - /* Alias for feature properties: */ object_property_add_alias(obj, "sse3", obj, "pni", &error_abort); object_property_add_alias(obj, "pclmuldq", obj, "pclmulqdq", &erro= r_abort); object_property_add_alias(obj, "sse4-1", obj, "sse4.1", &error_abo= rt); @@ -3505,6 +3504,28 @@ static void x86_cpu_initfn(Object *obj) object_property_add_alias(obj, "ffxsr", obj, "fxsr-opt", &error_ab= ort); object_property_add_alias(obj, "i64", obj, "lm", &error_abort); + object_property_add_alias(obj, "ds_cpl", obj, "ds-cpl", &error_abo= rt); + object_property_add_alias(obj, "tsc_adjust", obj, "tsc-adjust", &e= rror_abort); + object_property_add_alias(obj, "fxsr_opt", obj, "fxsr-opt", &error= _abort); + object_property_add_alias(obj, "lahf_lm", obj, "lahf-lm", &error_a= bort); + object_property_add_alias(obj, "cmp_legacy", obj, "cmp-legacy", &e= rror_abort); + object_property_add_alias(obj, "nodeid_msr", obj, "nodeid-msr", &e= rror_abort); + object_property_add_alias(obj, "perfctr_core", obj, "perfctr-core"= , &error_abort); + object_property_add_alias(obj, "perfctr_nb", obj, "perfctr-nb", &e= rror_abort); + object_property_add_alias(obj, "kvm_nopiodelay", obj, "kvm-nopiode= lay", &error_abort); + object_property_add_alias(obj, "kvm_mmu", obj, "kvm-mmu", &error_a= bort); + object_property_add_alias(obj, "kvm_asyncpf", obj, "kvm-asyncpf", = &error_abort); + object_property_add_alias(obj, "kvm_steal_time", obj, "kvm-steal-t= ime", &error_abort); + object_property_add_alias(obj, "kvm_pv_eoi", obj, "kvm-pv-eoi", &e= rror_abort); + object_property_add_alias(obj, "kvm_pv_unhalt", obj, "kvm-pv-unhal= t", &error_abort); + object_property_add_alias(obj, "svm_lock", obj, "svm-lock", &error= _abort); + object_property_add_alias(obj, "nrip_save", obj, "nrip-save", &err= or_abort); + object_property_add_alias(obj, "tsc_scale", obj, "tsc-scale", &err= or_abort); + object_property_add_alias(obj, "vmcb_clean", obj, "vmcb-clean", &e= rror_abort); + object_property_add_alias(obj, "pause_filter", obj, "pause-filter"= , &error_abort); + object_property_add_alias(obj, "sse4_1", obj, "sse4.1", &error_abo= rt); + object_property_add_alias(obj, "sse4_2", obj, "sse4.2", &error_abo= rt); + x86_cpu_load_def(cpu, xcc->cpu_def, &error_abort); } diff --git a/tests/test-x86-cpuid-compat.c b/tests/test-x86-cpuid-compa= t.c index 7cff2b5..260dd27 100644 --- a/tests/test-x86-cpuid-compat.c +++ b/tests/test-x86-cpuid-compat.c @@ -81,9 +81,14 @@ static void test_plus_minus(void) char *path; /* Rules: - * "-foo" overrides "+foo" - * "[+-]foo" overrides "foo=3D..." - * "foo_bar" should be translated to "foo-bar" + * 1)"-foo" overrides "+foo" + * 2) "[+-]foo" overrides "foo=3D..." + * 3) Old feature names with underscores (e.g. "sse4_2") + * should keep working + * + * Note: rules 1 and 2 are planned to be removed soon, but we + * need to keep compatibility for a while until we start + * warning users about it. */ qtest_start("-cpu pentium,-fpu,+fpu,-mce,mce=3Don,+cx8,cx8=3Doff,+= sse4_1,sse4_2=3Don"); path =3D get_cpu0_qom_path(); Changes v3 -> v4: * Removed patch "Define CPUID filtering functions before x86_cpu_list" * New patch: "tests: Add test case for x86 feature parsing compatibility" * New patch: "target-i386: Disable VME by default with TCG" * Disable VME by default on TCG to avoid returning bogus results for all CPU models in TCG mode * New patch: "target-i386: Make plus_features/minus_features QOM-based" * New patch: "target-i386: Remove underscores from property names" * New patch: "target-i386: Register properties for feature aliases manual= ly" * New patch: "target-i386: xsave: Add FP and SSE bits to x86_ext_save_are= as" * New patch: "target-i386: x86_cpu_load_features() function" * On patch: "target-i386: Return runnability information on query-cpu-def= initions" * Added code to handle unsupported XSAVE components cleanly * Use x86_cpu_load_features() function Changes v2 -> v3: * Small documentation reword * Suggested-by: Markus Armbruster * Create a x86_cpu_feature_name() function, to isolate the code that returns the property name Changes v1 -> v2: * Fixed documentation to say "(since 2.7)" * Removed @runnable field, improved documentation Example command output: { "return": [ { "unavailable-features": [], "static": false, "name": "host" }, { "unavailable-features": [], "static": false, "name": "qemu64" }, { "unavailable-features": [], "static": false, "name": "qemu32" }, { "unavailable-features": ["npt", "sse4a", "3dnow", "3dnowext",= "fxsr-opt", "mmxext"], "static": false, "name": "phenom" }, { "unavailable-features": [], "static": false, "name": "pentium3" }, { "unavailable-features": [], "static": false, "name": "pentium2" }, { "unavailable-features": [], "static": false, "name": "pentium" }, { "unavailable-features": [], "static": false, "name": "n270" }, { "unavailable-features": [], "static": false, "name": "kvm64" }, { "unavailable-features": [], "static": false, "name": "kvm32" }, { "unavailable-features": [], "static": false, "name": "coreduo" }, { "unavailable-features": [], "static": false, "name": "core2duo" }, { "unavailable-features": ["3dnow", "3dnowext", "mmxext"], "static": false, "name": "athlon" }, { "unavailable-features": [], "static": false, "name": "Westmere" }, { "unavailable-features": ["xgetbv1", "xsavec", "3dnowprefetch"= , "smap", "adx", "rdseed", "mpx", "rtm", "hle"], "static": false, "name": "Skylake-Client" }, { "unavailable-features": [], "static": false, "name": "SandyBridge" }, { "unavailable-features": [], "static": false, "name": "Penryn" }, { "unavailable-features": ["tbm", "fma4", "xop", "3dnowprefetch= ", "misalignsse", "sse4a"], "static": false, "name": "Opteron_G5" }, { "unavailable-features": ["fma4", "xop", "3dnowprefetch", "mis= alignsse", "sse4a"], "static": false, "name": "Opteron_G4" }, { "unavailable-features": ["misalignsse", "sse4a"], "static": false, "name": "Opteron_G3" }, { "unavailable-features": [], "static": false, "name": "Opteron_G2" }, { "unavailable-features": [], "static": false, "name": "Opteron_G1" }, { "unavailable-features": [], "static": false, "name": "Nehalem" }, { "unavailable-features": [], "static": false, "name": "IvyBridge" }, { "unavailable-features": ["rtm", "hle"], "static": false, "name": "Haswell" }, { "unavailable-features": [], "static": false, "name": "Haswell-noTSX" }, { "unavailable-features": [], "static": false, "name": "Conroe" }, { "unavailable-features": ["3dnowprefetch", "smap", "adx", "rds= eed", "rtm", "hle"], "static": false, "name": "Broadwell" }, { "unavailable-features": ["3dnowprefetch", "smap", "adx", "rds= eed"], "static": false, "name": "Broadwell-noTSX" }, { "unavailable-features": [], "static": false, "name": "486" } ]} Cc: David Hildenbrand Cc: Michael Mueller Cc: Christian Borntraeger Cc: Cornelia Huck Cc: Jiri Denemark Cc: libvir-list@redhat.com Eduardo Habkost (12): tests: Add test case for x86 feature parsing compatibility target-i386: List CPU models using subclass list target-i386: Disable VME by default with TCG target-i386: Register aliases for feature names with underscores target-i386: Make plus_features/minus_features QOM-based target-i386: Remove underscores from feat_names arrays target-i386: Register properties for feature aliases manually target-i386: xsave: Add FP and SSE bits to x86_ext_save_areas target-i386: Move warning code outside x86_cpu_filter_features() target-i386: x86_cpu_load_features() function qmp: Add runnability information to query-cpu-definitions target-i386: Return runnability information on query-cpu-definitions qapi-schema.json | 23 +- target-i386/cpu-qom.h | 4 + target-i386/cpu.c | 510 ++++++++++++++++++++++++++----------= ------ tests/test-x86-cpuid-compat.c | 44 ++++ 4 files changed, 388 insertions(+), 193 deletions(-) --=20 2.7.4