From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757554AbcJGXro (ORCPT ); Fri, 7 Oct 2016 19:47:44 -0400 Received: from mga05.intel.com ([192.55.52.43]:61787 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932870AbcJGXoy (ORCPT ); Fri, 7 Oct 2016 19:44:54 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,457,1473145200"; d="scan'208";a="17405489" From: "Fenghua Yu" To: "Thomas Gleixner" Cc: "H. Peter Anvin" , "Ingo Molnar" , "Tony Luck" , "Peter Zijlstra" , "Stephane Eranian" , "Borislav Petkov" , "Dave Hansen" , "Nilay Vaish" , "Shaohua Li" , "David Carrillo-Cisneros" , "Ravi V Shankar" , "Sai Prakhya" , "Vikas Shivappa" , "linux-kernel" , "x86" , "Fenghua Yu" Subject: [PATCH v3 06/18] x86/intel_rdt: Add CONFIG, Makefile, and basic initialization Date: Fri, 7 Oct 2016 19:45:51 -0700 Message-Id: <1475894763-64683-7-git-send-email-fenghua.yu@intel.com> X-Mailer: git-send-email 1.8.0.1 In-Reply-To: <1475894763-64683-1-git-send-email-fenghua.yu@intel.com> References: <1475894763-64683-1-git-send-email-fenghua.yu@intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Fenghua Yu Introduce CONFIG_INTEL_RDT (default: no, dependent on X86 and CPU_SUP_INTEL) to control inclusion of Resource Director Technology in the build. Simple init() routine just checks which features are present. If they are pr_info() one line summary for each feature. Signed-off-by: Fenghua Yu Signed-off-by: Tony Luck --- arch/x86/Kconfig | 12 +++++++++ arch/x86/kernel/cpu/Makefile | 2 ++ arch/x86/kernel/cpu/intel_rdt.c | 56 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 70 insertions(+) create mode 100644 arch/x86/kernel/cpu/intel_rdt.c diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 2a1f0ce..cfca613 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -406,6 +406,18 @@ config GOLDFISH def_bool y depends on X86_GOLDFISH +config INTEL_RDT + bool "Intel Resource Director Technology support" + default n + depends on X86 && CPU_SUP_INTEL + help + Select to enable resource allocation which is a sub-feature of + Intel Resource Director Technology(RDT). More information about + RDT can be found in the Intel x86 Architecture Software + Developer Manual June 2016, volume 3, section 17.17. + + Say N if unsure. + if X86_32 config X86_EXTENDED_PLATFORM bool "Support for extended (non-PC) x86 platforms" diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile index 4a8697f..5a791c8 100644 --- a/arch/x86/kernel/cpu/Makefile +++ b/arch/x86/kernel/cpu/Makefile @@ -34,6 +34,8 @@ obj-$(CONFIG_CPU_SUP_CENTAUR) += centaur.o obj-$(CONFIG_CPU_SUP_TRANSMETA_32) += transmeta.o obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o +obj-$(CONFIG_INTEL_RDT) += intel_rdt.o + obj-$(CONFIG_X86_MCE) += mcheck/ obj-$(CONFIG_MTRR) += mtrr/ obj-$(CONFIG_MICROCODE) += microcode/ diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c new file mode 100644 index 0000000..ebe8dae --- /dev/null +++ b/arch/x86/kernel/cpu/intel_rdt.c @@ -0,0 +1,56 @@ +/* + * Resource Director Technology(RDT) + * - Cache Allocation code. + * + * Copyright (C) 2016 Intel Corporation + * + * Authors: + * Fenghua Yu + * Tony Luck + * Vikas Shivappa + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * More information about RDT be found in the Intel (R) x86 Architecture + * Software Developer Manual June 2016, volume 3, section 17.17. + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include + +static inline bool get_rdt_resources(struct cpuinfo_x86 *c) +{ + bool ret = false; + + if (!cpu_has(c, X86_FEATURE_RDT_A)) + return false; + if (cpu_has(c, X86_FEATURE_CAT_L3)) + ret = true; + + return ret; +} + +static int __init intel_rdt_late_init(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + + if (!get_rdt_resources(c)) + return -ENODEV; + + pr_info("Intel cache allocation detected\n"); + if (cpu_has(c, X86_FEATURE_CDP_L3)) + pr_info("Intel code data prioritization detected\n"); + + return 0; +} + +late_initcall(intel_rdt_late_init); -- 2.5.0