From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48831) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bvcHe-0003MD-Ar for qemu-devel@nongnu.org; Sat, 15 Oct 2016 23:38:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bvcHd-0005qP-Bl for qemu-devel@nongnu.org; Sat, 15 Oct 2016 23:38:46 -0400 Received: from mail-qk0-x243.google.com ([2607:f8b0:400d:c09::243]:35534) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1bvcHd-0005qF-72 for qemu-devel@nongnu.org; Sat, 15 Oct 2016 23:38:45 -0400 Received: by mail-qk0-x243.google.com with SMTP id v138so11423730qka.2 for ; Sat, 15 Oct 2016 20:38:45 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sat, 15 Oct 2016 20:37:44 -0700 Message-Id: <1476589070-5792-10-git-send-email-rth@twiddle.net> In-Reply-To: <1476589070-5792-1-git-send-email-rth@twiddle.net> References: <1476589070-5792-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 09/15] tcg/s390: Implement field extraction opcodes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexander Graf Cc: Alexander Graf Signed-off-by: Richard Henderson --- tcg/s390/tcg-target.h | 12 +++++++----- tcg/s390/tcg-target.inc.c | 13 ++++++++++++- 2 files changed, 19 insertions(+), 6 deletions(-) diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 9583df4..cf8fbfd 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -66,7 +66,7 @@ typedef enum TCGReg { #define TCG_TARGET_HAS_nand_i32 0 #define TCG_TARGET_HAS_nor_i32 0 #define TCG_TARGET_HAS_deposit_i32 1 -#define TCG_TARGET_HAS_extract_i32 0 +#define TCG_TARGET_HAS_extract_i32 1 #define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 @@ -97,7 +97,7 @@ typedef enum TCGReg { #define TCG_TARGET_HAS_nand_i64 0 #define TCG_TARGET_HAS_nor_i64 0 #define TCG_TARGET_HAS_deposit_i64 1 -#define TCG_TARGET_HAS_extract_i64 0 +#define TCG_TARGET_HAS_extract_i64 1 #define TCG_TARGET_HAS_sextract_i64 0 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 @@ -107,9 +107,11 @@ typedef enum TCGReg { #define TCG_TARGET_HAS_muluh_i64 0 #define TCG_TARGET_HAS_mulsh_i64 0 -extern bool tcg_target_deposit_valid(int ofs, int len); -#define TCG_TARGET_deposit_i32_valid tcg_target_deposit_valid -#define TCG_TARGET_deposit_i64_valid tcg_target_deposit_valid +extern bool tcg_target_have_gen_inst(void); +#define TCG_TARGET_deposit_i32_valid(o,l) tcg_target_have_gen_inst() +#define TCG_TARGET_deposit_i64_valid(o,l) tcg_target_have_gen_inst() +#define TCG_TARGET_extract_i32_valid(o,l) tcg_target_have_gen_inst() +#define TCG_TARGET_extract_i64_valid(o,l) tcg_target_have_gen_inst() /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_R15 diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 253d4a0..fa9e144 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -1250,7 +1250,7 @@ static void tgen_movcond(TCGContext *s, TCGType type, TCGCond c, TCGReg dest, } } -bool tcg_target_deposit_valid(int ofs, int len) +bool tcg_target_have_gen_inst(void) { return (facilities & FACILITY_GEN_INST_EXT) != 0; } @@ -1263,6 +1263,12 @@ static void tgen_deposit(TCGContext *s, TCGReg dest, TCGReg src, tcg_out_risbg(s, dest, src, msb, lsb, ofs, 0); } +static void tgen_extract(TCGContext *s, TCGReg dest, TCGReg src, + int ofs, int len) +{ + tcg_out_risbg(s, dest, src, 64 - len, 63, 64 - ofs, 1); +} + static void tgen_gotoi(TCGContext *s, int cc, tcg_insn_unit *dest) { ptrdiff_t off = dest - s->code_ptr; @@ -2169,6 +2175,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, OP_32_64(deposit): tgen_deposit(s, args[0], args[2], args[3], args[4]); break; + OP_32_64(extract): + tgen_extract(s, args[0], args[1], args[2], args[3]); + break; case INDEX_op_mb: /* The host memory model is quite strong, we simply need to @@ -2238,6 +2247,7 @@ static const TCGTargetOpDef s390_op_defs[] = { { INDEX_op_setcond_i32, { "r", "r", "rC" } }, { INDEX_op_movcond_i32, { "r", "r", "rC", "r", "0" } }, { INDEX_op_deposit_i32, { "r", "0", "r" } }, + { INDEX_op_extract_i32, { "r", "r" } }, { INDEX_op_qemu_ld_i32, { "r", "L" } }, { INDEX_op_qemu_ld_i64, { "r", "L" } }, @@ -2299,6 +2309,7 @@ static const TCGTargetOpDef s390_op_defs[] = { { INDEX_op_setcond_i64, { "r", "r", "rC" } }, { INDEX_op_movcond_i64, { "r", "r", "rC", "r", "0" } }, { INDEX_op_deposit_i64, { "r", "0", "r" } }, + { INDEX_op_extract_i64, { "r", "r" } }, { INDEX_op_mb, { } }, { -1 }, -- 2.7.4