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From: Igor Mammedov <imammedo@redhat.com>
To: qemu-devel@nongnu.org
Cc: kraxel@redhat.com, ehabkost@redhat.com, liuxiaojian6@huawei.com,
	mst@redhat.com, rkrcmar@redhat.com, peterx@redhat.com,
	kevin@koconnor.net, pbonzini@redhat.com, lersek@redhat.com,
	chao.gao@intel.com
Subject: [Qemu-devel] [PATCH v4 05/13] pc: apic_common: extend APIC ID property to 32bit
Date: Wed, 19 Oct 2016 14:05:35 +0200	[thread overview]
Message-ID: <1476878743-144953-6-git-send-email-imammedo@redhat.com> (raw)
In-Reply-To: <1476878743-144953-1-git-send-email-imammedo@redhat.com>

ACPI ID is 32 bit wide on CPUs with x2APIC support.
Extend 'id' property to support it.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
v3:
   keep original behaviour where 'id' is readonly after
   object is realized (pbonzini)
---
 include/hw/i386/apic_internal.h |  3 ++-
 target-i386/cpu.h               |  1 +
 hw/intc/apic_common.c           | 46 ++++++++++++++++++++++++++++++++++++++++-
 target-i386/cpu.c               |  2 +-
 4 files changed, 49 insertions(+), 3 deletions(-)

diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_internal.h
index cdd11fb..1209eb4 100644
--- a/include/hw/i386/apic_internal.h
+++ b/include/hw/i386/apic_internal.h
@@ -160,7 +160,8 @@ struct APICCommonState {
     MemoryRegion io_memory;
     X86CPU *cpu;
     uint32_t apicbase;
-    uint8_t id;
+    uint8_t id; /* legacy APIC ID */
+    uint32_t initial_apic_id;
     uint8_t version;
     uint8_t arb_id;
     uint8_t tpr;
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index e645698..6303d65 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -325,6 +325,7 @@
 #define MSR_IA32_APICBASE               0x1b
 #define MSR_IA32_APICBASE_BSP           (1<<8)
 #define MSR_IA32_APICBASE_ENABLE        (1<<11)
+#define MSR_IA32_APICBASE_EXTD          (1 << 10)
 #define MSR_IA32_APICBASE_BASE          (0xfffffU<<12)
 #define MSR_IA32_FEATURE_CONTROL        0x0000003a
 #define MSR_TSC_ADJUST                  0x0000003b
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 8d01c9c..30f2af0 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -22,6 +22,7 @@
 #include "qapi/error.h"
 #include "qemu-common.h"
 #include "cpu.h"
+#include "qapi/visitor.h"
 #include "hw/i386/apic.h"
 #include "hw/i386/apic_internal.h"
 #include "trace.h"
@@ -428,7 +429,6 @@ static const VMStateDescription vmstate_apic_common = {
 };
 
 static Property apic_properties_common[] = {
-    DEFINE_PROP_UINT8("id", APICCommonState, id, -1),
     DEFINE_PROP_UINT8("version", APICCommonState, version, 0x14),
     DEFINE_PROP_BIT("vapic", APICCommonState, vapic_control, VAPIC_ENABLE_BIT,
                     true),
@@ -437,6 +437,49 @@ static Property apic_properties_common[] = {
     DEFINE_PROP_END_OF_LIST(),
 };
 
+static void apic_common_get_id(Object *obj, Visitor *v, const char *name,
+                               void *opaque, Error **errp)
+{
+    APICCommonState *s = APIC_COMMON(obj);
+    int64_t value;
+
+    value = s->apicbase & MSR_IA32_APICBASE_EXTD ? s->initial_apic_id : s->id;
+    visit_type_int(v, name, &value, errp);
+}
+
+static void apic_common_set_id(Object *obj, Visitor *v, const char *name,
+                               void *opaque, Error **errp)
+{
+    APICCommonState *s = APIC_COMMON(obj);
+    DeviceState *dev = DEVICE(obj);
+    Error *local_err = NULL;
+    int64_t value;
+
+    if (dev->realized) {
+        qdev_prop_set_after_realize(dev, name, errp);
+        return;
+    }
+
+    visit_type_int(v, name, &value, &local_err);
+    if (local_err) {
+        error_propagate(errp, local_err);
+        return;
+    }
+
+    s->initial_apic_id = value;
+    s->id = (uint8_t)value;
+}
+
+static void apic_common_initfn(Object *obj)
+{
+    APICCommonState *s = APIC_COMMON(obj);
+
+    s->id = s->initial_apic_id = -1;
+    object_property_add(obj, "id", "int",
+                        apic_common_get_id,
+                        apic_common_set_id, NULL, NULL, NULL);
+}
+
 static void apic_common_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
@@ -456,6 +499,7 @@ static const TypeInfo apic_common_type = {
     .name = TYPE_APIC_COMMON,
     .parent = TYPE_DEVICE,
     .instance_size = sizeof(APICCommonState),
+    .instance_init = apic_common_initfn,
     .class_size = sizeof(APICCommonClass),
     .class_init = apic_common_class_init,
     .abstract = true,
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index d95514c..7dc6f62 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2945,7 +2945,7 @@ static void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
                               OBJECT(cpu->apic_state), &error_abort);
     object_unref(OBJECT(cpu->apic_state));
 
-    qdev_prop_set_uint8(cpu->apic_state, "id", cpu->apic_id);
+    qdev_prop_set_uint32(cpu->apic_state, "id", cpu->apic_id);
     /* TODO: convert to link<> */
     apic = APIC_COMMON(cpu->apic_state);
     apic->cpu = cpu;
-- 
2.7.4

  parent reply	other threads:[~2016-10-19 12:06 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-19 12:05 [Qemu-devel] [PATCH v4 00/13] pc: q35: x2APIC support in kvm_apic mode Igor Mammedov
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 01/13] pc: acpi: x2APIC support for MADT table and _MAT method Igor Mammedov
2016-10-19 12:54   ` Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 02/13] pc: acpi: x2APIC support for SRAT table Igor Mammedov
2016-10-19 12:54   ` Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 03/13] acpi: cphp: force switch to modern cpu hotplug if APIC ID > 254 Igor Mammedov
2016-10-19 12:54   ` Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 04/13] pc: leave max apic_id_limit only in legacy cpu hotplug code Igor Mammedov
2016-10-19 12:05 ` Igor Mammedov [this message]
2016-10-19 12:55   ` [Qemu-devel] [PATCH v4 05/13] pc: apic_common: extend APIC ID property to 32bit Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 06/13] pc: apic_common: restore APIC ID to initial ID on reset Igor Mammedov
2016-10-19 12:56   ` Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 07/13] pc: apic_common: reset APIC ID to initial ID when switching into x2APIC mode Igor Mammedov
2016-10-19 12:56   ` Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 08/13] pc: kvm_apic: pass APIC ID depending on xAPIC/x2APIC mode Igor Mammedov
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 09/13] pc: clarify FW_CFG_MAX_CPUS usage comment Igor Mammedov
2016-10-19 12:58   ` Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 10/13] increase MAX_CPUMASK_BITS from 255 to 288 Igor Mammedov
2016-10-19 13:16   ` Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 11/13] pc: add 'etc/boot-cpus' fw_cfg file for machine with more than 255 CPUs Igor Mammedov
2016-10-19 13:15   ` Eduardo Habkost
2016-10-19 15:18     ` Igor Mammedov
2016-10-19 18:29       ` Eduardo Habkost
2016-10-20 11:27         ` Igor Mammedov
2016-10-20 12:27           ` Eduardo Habkost
2016-10-20 13:27             ` Igor Mammedov
2016-10-20 14:15               ` Eduardo Habkost
2016-10-20 14:42                 ` Igor Mammedov
2016-10-20 14:49             ` Kevin O'Connor
2016-10-20 14:58   ` [Qemu-devel] [PATCH v5 " Igor Mammedov
2016-10-20 18:11     ` Eduardo Habkost
2016-10-20 18:51     ` [Qemu-devel] [PATCH] fixup! " Eduardo Habkost
2016-10-21  8:53       ` Igor Mammedov
2016-10-21 11:41         ` Eduardo Habkost
2016-10-27 22:08         ` Michael S. Tsirkin
2016-10-28  0:53           ` Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 12/13] pc: require IRQ remapping and EIM if there could be x2APIC CPUs Igor Mammedov
2016-10-19 13:17   ` Eduardo Habkost
2016-10-19 12:05 ` [Qemu-devel] [PATCH v4 13/13] pc: q35: bump max_cpus to 288 Igor Mammedov
2016-10-19 13:19   ` Eduardo Habkost
2016-10-19 13:29 ` [Qemu-devel] [PATCH v4 00/13] pc: q35: x2APIC support in kvm_apic mode Daniel P. Berrange
2016-10-19 15:22   ` Igor Mammedov

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