From: Max Krummenacher <max.oss.09@gmail.com> To: Ahmad Fatoum <a.fatoum@pengutronix.de> Cc: Max Krummenacher <max.krummenacher@toradex.com>, Lucas Stach <l.stach@pengutronix.de>, linux-arm-kernel@lists.infradead.org, Fabio Estevam <festevam@gmail.com>, Rouven Czerwinski <r.czerwinski@pengutronix.de>, linux-kernel@vger.kernel.org, Pengutronix Kernel Team <kernel@pengutronix.de>, Sascha Hauer <s.hauer@pengutronix.de>, Russell King <linux@armlinux.org.uk>, Shawn Guo <shawnguo@kernel.org>, NXP Linux Team <linux-imx@nxp.com> Subject: Re: [PATCH 1/1] ARM: imx: build suspend-imx6.S with arm instruction set Date: Mon, 11 Jan 2021 19:30:51 +0100 [thread overview] Message-ID: <147692b37063057ce4128894db112caf9320b65b.camel@gmail.com> (raw) In-Reply-To: <ecc65820-6b94-bb11-f475-aa0296fce5b8@pengutronix.de> Resent due to gmail adding HTML, sorry for the noise. Am Montag, den 11.01.2021, 18:49 +0100 schrieb Ahmad Fatoum: > > On 11.01.21 16:17, Max Krummenacher wrote: > > When the kernel is configured to use the Thumb-2 instruction set > > "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL > > (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q). > > > > It looks like the CPU resumes unconditionally in ARM instruction mode > > and then chokes on the presented Thumb-2 code it should execute. > > > > Fix this by using the arm instruction set for all code in > > suspend-imx6.S. > > > > Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> > > > > --- > > > > arch/arm/mach-imx/suspend-imx6.S | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S > > index 1eabf2d2834be..e06f946b75b96 100644 > > --- a/arch/arm/mach-imx/suspend-imx6.S > > +++ b/arch/arm/mach-imx/suspend-imx6.S > > @@ -67,6 +67,7 @@ > > #define MX6Q_CCM_CCR 0x0 > > > > .align 3 > > + .arm > > You had a return to thumb at the end of this subroutine in the cover letter, > yet here it's omitted. Why? Now the whole subroutine is compiled for ARM and the return address has bit 0 set so that on jumping back to the caller the CPU will switch back to Thumb-2. Probably the return to Thumb-2 isn't needed in the cover letter solution and it would also work to finish the subroutine in ARM instruction set. However it looks strange to me if a function which begins with the ARM instruction set would come to the return in Thumb-2. > > > > > .macro sync_l2_cache > > > >
WARNING: multiple messages have this Message-ID (diff)
From: Max Krummenacher <max.oss.09@gmail.com> To: Ahmad Fatoum <a.fatoum@pengutronix.de> Cc: Rouven Czerwinski <r.czerwinski@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, linux-kernel@vger.kernel.org, Russell King <linux@armlinux.org.uk>, NXP Linux Team <linux-imx@nxp.com>, Max Krummenacher <max.krummenacher@toradex.com>, Fabio Estevam <festevam@gmail.com>, linux-arm-kernel@lists.infradead.org, Lucas Stach <l.stach@pengutronix.de> Subject: Re: [PATCH 1/1] ARM: imx: build suspend-imx6.S with arm instruction set Date: Mon, 11 Jan 2021 19:30:51 +0100 [thread overview] Message-ID: <147692b37063057ce4128894db112caf9320b65b.camel@gmail.com> (raw) In-Reply-To: <ecc65820-6b94-bb11-f475-aa0296fce5b8@pengutronix.de> Resent due to gmail adding HTML, sorry for the noise. Am Montag, den 11.01.2021, 18:49 +0100 schrieb Ahmad Fatoum: > > On 11.01.21 16:17, Max Krummenacher wrote: > > When the kernel is configured to use the Thumb-2 instruction set > > "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL > > (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q). > > > > It looks like the CPU resumes unconditionally in ARM instruction mode > > and then chokes on the presented Thumb-2 code it should execute. > > > > Fix this by using the arm instruction set for all code in > > suspend-imx6.S. > > > > Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> > > > > --- > > > > arch/arm/mach-imx/suspend-imx6.S | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S > > index 1eabf2d2834be..e06f946b75b96 100644 > > --- a/arch/arm/mach-imx/suspend-imx6.S > > +++ b/arch/arm/mach-imx/suspend-imx6.S > > @@ -67,6 +67,7 @@ > > #define MX6Q_CCM_CCR 0x0 > > > > .align 3 > > + .arm > > You had a return to thumb at the end of this subroutine in the cover letter, > yet here it's omitted. Why? Now the whole subroutine is compiled for ARM and the return address has bit 0 set so that on jumping back to the caller the CPU will switch back to Thumb-2. Probably the return to Thumb-2 isn't needed in the cover letter solution and it would also work to finish the subroutine in ARM instruction set. However it looks strange to me if a function which begins with the ARM instruction set would come to the return in Thumb-2. > > > > > .macro sync_l2_cache > > > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-11 18:31 UTC|newest] Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-11 15:17 [PATCH 0/1] ARM: imx: build suspend-imx6.S with arm instruction set Max Krummenacher 2021-01-11 15:17 ` Max Krummenacher 2021-01-11 15:17 ` [PATCH 1/1] " Max Krummenacher 2021-01-11 15:17 ` Max Krummenacher 2021-01-11 17:38 ` Oleksandr Suvorov 2021-01-11 17:38 ` Oleksandr Suvorov 2021-01-11 17:49 ` Ahmad Fatoum 2021-01-11 17:49 ` Ahmad Fatoum 2021-01-11 18:30 ` Max Krummenacher [this message] 2021-01-11 18:30 ` Max Krummenacher 2021-01-18 6:45 ` Shawn Guo 2021-01-18 6:45 ` Shawn Guo
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