From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37958) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1byr8k-0004eO-TN for qemu-devel@nongnu.org; Mon, 24 Oct 2016 22:06:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1byr8h-0008El-Ne for qemu-devel@nongnu.org; Mon, 24 Oct 2016 22:06:58 -0400 Received: from bh-25.webhostbox.net ([208.91.199.152]:34044) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1byr8h-0008ES-IO for qemu-devel@nongnu.org; Mon, 24 Oct 2016 22:06:55 -0400 From: Guenter Roeck Date: Mon, 24 Oct 2016 19:06:52 -0700 Message-Id: <1477361212-18833-1-git-send-email-linux@roeck-us.net> Subject: [Qemu-devel] [PATCH] hw/arm/pxa2xx: Correctly handle external GPIO reset requests List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Guenter Roeck The internal GPIO reset, enabled with GPR_EN, only applies to GPIO pin 1. If other GPIO pins are used for reset, this is unrelated to GPR_EN, the reset is an external reset pin, and it resets the entire system. This fixes GPIO reset failures seen with various PXA270 emulations (akita, borzoi, spitz, tosa, terrier) when running Linux. Signed-off-by: Guenter Roeck --- hw/arm/pxa2xx.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index cb55704..2a2a821 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -2048,10 +2048,18 @@ static void pxa2xx_reset(void *opaque, int line, int level) { PXA2xxState *s = (PXA2xxState *) opaque; - if (level && (s->pm_regs[PCFR >> 2] & 0x10)) { /* GPR_EN */ + /* + * GPIO pin 1 is the CPU internal GPIO reset, enabled with GPR_EN. + * Any other pin is board specific and resets the entire system. + */ + if (line == 1 && level && (s->pm_regs[PCFR >> 2] & 0x10)) { /* GPR_EN */ cpu_reset(CPU(s->cpu)); /* TODO: reset peripherals */ } + + if (line != 1 && level) { + qemu_system_reset_request(); + } } /* Initialise a PXA270 integrated chip (ARM based core). */ -- 2.5.0