All of lore.kernel.org
 help / color / mirror / Atom feed

diff for duplicates of <1478151727-20250-6-git-send-email-anurup.m@huawei.com>

diff --git a/a/1.txt b/N1/1.txt
index 333b340..3e29de5 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -92,7 +92,7 @@ index 0000000..e7b35e0
 +
 +Example:
 +
-+	djtag0: djtag@0 {
++	djtag0: djtag at 0 {
 +		compatible = "hisilicon,hip05-cpu-djtag-v1";
 +		pmul3c0 {
 +			compatible = "hisilicon,hisi-pmu-l3c-v1";
@@ -133,7 +133,7 @@ index 0000000..e7b35e0
 +
 +Example:
 +	/* DDRC for CPU die scl #2 Channel #1 for hip05 */
-+	pmu_sccl0_ddrc1: pmu_ddrc1@80358000 {
++	pmu_sccl0_ddrc1: pmu_ddrc1 at 80358000 {
 +		 compatible = "hisilicon,hisi-pmu-ddrc-v1";
 +		 scl-id = <0x02>;
 +		 ch-id = <0x1>;
diff --git a/a/content_digest b/N1/content_digest
index 78b0c48..8615025 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,7 +2,7 @@
   "ref\0001478151727-20250-1-git-send-email-anurup.m\@huawei.com\0"
 ]
 [
-  "From\0Anurup M <anurupvasu\@gmail.com>\0"
+  "From\0anurupvasu\@gmail.com (Anurup M)\0"
 ]
 [
   "Subject\0[RESEND PATCH v1 05/11] dt-bindings: perf: hisi: Add Devicetree bindings for Hisilicon SoC PMU\0"
@@ -11,33 +11,7 @@
   "Date\0Thu,  3 Nov 2016 01:42:01 -0400\0"
 ]
 [
-  "To\0devicetree\@vger.kernel.org",
-  " linux-arm-kernel\@lists.infradead.org",
-  " linux-doc\@vger.kernel.org",
-  " mark.rutland\@arm.com",
-  " will.deacon\@arm.com",
-  " corbet\@lwn.net",
-  " catalin.marinas\@arm.com",
-  " robh+dt\@kernel.org",
-  " arnd\@arndb.de",
-  " f.fainelli\@gmail.com",
-  " rmk+kernel\@arm.linux.org.uk",
-  " krzk\@kernel.org",
-  " anurup.m\@huawei.com",
-  " zhangshaokun\@hisilicon.com",
-  " tanxiaojun\@huawei.com",
-  " xuwei5\@hisilicon.com",
-  " sanil.kumar\@hisilicon.com",
-  " john.garry\@huawei.com",
-  " gabriele.paoloni\@huawei.com",
-  " shiju.jose\@huawei.com",
-  " wangkefeng.wang\@huawei.com\0"
-]
-[
-  "Cc\0guohanjun\@huawei.com",
-  " shyju.pv\@huawei.com",
-  " linuxarm\@huawei.com",
-  " anurupvasu\@gmail.com\0"
+  "To\0linux-arm-kernel\@lists.infradead.org\0"
 ]
 [
   "\0000:1\0"
@@ -140,7 +114,7 @@
   "+\n",
   "+Example:\n",
   "+\n",
-  "+\tdjtag0: djtag\@0 {\n",
+  "+\tdjtag0: djtag at 0 {\n",
   "+\t\tcompatible = \"hisilicon,hip05-cpu-djtag-v1\";\n",
   "+\t\tpmul3c0 {\n",
   "+\t\t\tcompatible = \"hisilicon,hisi-pmu-l3c-v1\";\n",
@@ -181,7 +155,7 @@
   "+\n",
   "+Example:\n",
   "+\t/* DDRC for CPU die scl #2 Channel #1 for hip05 */\n",
-  "+\tpmu_sccl0_ddrc1: pmu_ddrc1\@80358000 {\n",
+  "+\tpmu_sccl0_ddrc1: pmu_ddrc1 at 80358000 {\n",
   "+\t\t compatible = \"hisilicon,hisi-pmu-ddrc-v1\";\n",
   "+\t\t scl-id = <0x02>;\n",
   "+\t\t ch-id = <0x1>;\n",
@@ -193,4 +167,4 @@
   "2.1.4"
 ]
 
-3c9d18cb4b8ab719e2ace6ea3b3dd613e980ae5609da0b8709f59c9591f5d537
+9374d1d9ceab262b9d1f015cd170c1856b2a388ad29bb001557f3b9dd3e24889
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.