From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934507AbcKDLZu (ORCPT ); Fri, 4 Nov 2016 07:25:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53710 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934533AbcKDLYv (ORCPT ); Fri, 4 Nov 2016 07:24:51 -0400 From: Eric Auger To: eric.auger@redhat.com, eric.auger.pro@gmail.com, christoffer.dall@linaro.org, marc.zyngier@arm.com, robin.murphy@arm.com, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, linux-arm-kernel@lists.infradead.org Cc: kvm@vger.kernel.org, drjones@redhat.com, linux-kernel@vger.kernel.org, pranav.sawargaonkar@gmail.com, iommu@lists.linux-foundation.org, punit.agrawal@arm.com, diana.craciun@nxp.com Subject: [RFC v2 8/8] iommu/arm-smmu: implement add_reserved_regions callback Date: Fri, 4 Nov 2016 11:24:06 +0000 Message-Id: <1478258646-3117-9-git-send-email-eric.auger@redhat.com> In-Reply-To: <1478258646-3117-1-git-send-email-eric.auger@redhat.com> References: <1478258646-3117-1-git-send-email-eric.auger@redhat.com> X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 04 Nov 2016 11:24:51 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The function populates the list of reserved regions with the PCI host bridge windows and the MSI IOVA range. At the moment an arbitray MSI IOVA window is set at 0x8000000 of size 1MB. Signed-off-by: Eric Auger --- RFC v1 -> v2: use defines for MSI IOVA base and length --- drivers/iommu/arm-smmu.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index c841eb7..c07ea41 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -278,6 +278,9 @@ enum arm_smmu_s2cr_privcfg { #define FSYNR0_WNR (1 << 4) +#define MSI_IOVA_BASE 0x8000000 +#define MSI_IOVA_LENGTH 0x100000 + static int force_stage; module_param(force_stage, int, S_IRUGO); MODULE_PARM_DESC(force_stage, @@ -1533,6 +1536,68 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) return iommu_fwspec_add_ids(dev, &fwid, 1); } +static int add_pci_window_reserved_regions(struct iommu_domain *domain, + struct pci_dev *dev) +{ + struct pci_host_bridge *bridge = pci_find_host_bridge(dev->bus); + struct iommu_reserved_region *region; + struct resource_entry *window; + phys_addr_t start; + size_t length; + + resource_list_for_each_entry(window, &bridge->windows) { + if (resource_type(window->res) != IORESOURCE_MEM && + resource_type(window->res) != IORESOURCE_IO) + continue; + + start = window->res->start - window->offset; + length = window->res->end - window->res->start + 1; + + iommu_reserved_region_for_each(region, domain) { + if (region->start == start && region->length == length) + continue; + } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + + region->start = start; + region->length = length; + + list_add_tail(®ion->list, &domain->reserved_regions); + } + return 0; +} + +static int arm_smmu_add_reserved_regions(struct iommu_domain *domain, + struct device *device) +{ + struct iommu_reserved_region *region; + int ret = 0; + + /* An arbitrary 1MB region starting at 0x8000000 is reserved for MSIs */ + if (!domain->iova_cookie) { + + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + + region->start = MSI_IOVA_BASE; + region->length = MSI_IOVA_LENGTH; + list_add_tail(®ion->list, &domain->reserved_regions); + + ret = iommu_get_dma_msi_region_cookie(domain, + region->start, region->length); + if (ret) + return ret; + } + + if (dev_is_pci(device)) + ret = add_pci_window_reserved_regions(domain, + to_pci_dev(device)); + return ret; +} + static struct iommu_ops arm_smmu_ops = { .capable = arm_smmu_capable, .domain_alloc = arm_smmu_domain_alloc, @@ -1548,6 +1613,7 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) .domain_get_attr = arm_smmu_domain_get_attr, .domain_set_attr = arm_smmu_domain_set_attr, .of_xlate = arm_smmu_of_xlate, + .add_reserved_regions = arm_smmu_add_reserved_regions, .pgsize_bitmap = -1UL, /* Restricted during device attach */ }; -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Auger Subject: [RFC v2 8/8] iommu/arm-smmu: implement add_reserved_regions callback Date: Fri, 4 Nov 2016 11:24:06 +0000 Message-ID: <1478258646-3117-9-git-send-email-eric.auger@redhat.com> References: <1478258646-3117-1-git-send-email-eric.auger@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: drjones-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, punit.agrawal-5wv7dgnIgG8@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, pranav.sawargaonkar-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org To: eric.auger-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, eric.auger.pro-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, christoffer.dall-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, marc.zyngier-5wv7dgnIgG8@public.gmane.org, robin.murphy-5wv7dgnIgG8@public.gmane.org, alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, will.deacon-5wv7dgnIgG8@public.gmane.org, joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org, tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org, jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Return-path: In-Reply-To: <1478258646-3117-1-git-send-email-eric.auger-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org List-Id: kvm.vger.kernel.org The function populates the list of reserved regions with the PCI host bridge windows and the MSI IOVA range. At the moment an arbitray MSI IOVA window is set at 0x8000000 of size 1MB. Signed-off-by: Eric Auger --- RFC v1 -> v2: use defines for MSI IOVA base and length --- drivers/iommu/arm-smmu.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index c841eb7..c07ea41 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -278,6 +278,9 @@ enum arm_smmu_s2cr_privcfg { #define FSYNR0_WNR (1 << 4) +#define MSI_IOVA_BASE 0x8000000 +#define MSI_IOVA_LENGTH 0x100000 + static int force_stage; module_param(force_stage, int, S_IRUGO); MODULE_PARM_DESC(force_stage, @@ -1533,6 +1536,68 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) return iommu_fwspec_add_ids(dev, &fwid, 1); } +static int add_pci_window_reserved_regions(struct iommu_domain *domain, + struct pci_dev *dev) +{ + struct pci_host_bridge *bridge = pci_find_host_bridge(dev->bus); + struct iommu_reserved_region *region; + struct resource_entry *window; + phys_addr_t start; + size_t length; + + resource_list_for_each_entry(window, &bridge->windows) { + if (resource_type(window->res) != IORESOURCE_MEM && + resource_type(window->res) != IORESOURCE_IO) + continue; + + start = window->res->start - window->offset; + length = window->res->end - window->res->start + 1; + + iommu_reserved_region_for_each(region, domain) { + if (region->start == start && region->length == length) + continue; + } + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + + region->start = start; + region->length = length; + + list_add_tail(®ion->list, &domain->reserved_regions); + } + return 0; +} + +static int arm_smmu_add_reserved_regions(struct iommu_domain *domain, + struct device *device) +{ + struct iommu_reserved_region *region; + int ret = 0; + + /* An arbitrary 1MB region starting at 0x8000000 is reserved for MSIs */ + if (!domain->iova_cookie) { + + region = kzalloc(sizeof(*region), GFP_KERNEL); + if (!region) + return -ENOMEM; + + region->start = MSI_IOVA_BASE; + region->length = MSI_IOVA_LENGTH; + list_add_tail(®ion->list, &domain->reserved_regions); + + ret = iommu_get_dma_msi_region_cookie(domain, + region->start, region->length); + if (ret) + return ret; + } + + if (dev_is_pci(device)) + ret = add_pci_window_reserved_regions(domain, + to_pci_dev(device)); + return ret; +} + static struct iommu_ops arm_smmu_ops = { .capable = arm_smmu_capable, .domain_alloc = arm_smmu_domain_alloc, @@ -1548,6 +1613,7 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) .domain_get_attr = arm_smmu_domain_get_attr, .domain_set_attr = arm_smmu_domain_set_attr, .of_xlate = arm_smmu_of_xlate, + .add_reserved_regions = arm_smmu_add_reserved_regions, .pgsize_bitmap = -1UL, /* Restricted during device attach */ }; -- 1.9.1