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From: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, david@gibson.dropbear.id.au,
	nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH 1/4] target-ppc: Implement bcdcfsq. instruction
Date: Wed, 16 Nov 2016 18:07:27 -0200	[thread overview]
Message-ID: <1479326850-8369-2-git-send-email-joserz@linux.vnet.ibm.com> (raw)
In-Reply-To: <1479326850-8369-1-git-send-email-joserz@linux.vnet.ibm.com>

bcdcfsq.: Decimal convert from signed quadword. It is possible to
convert values less than 10^31-1 or greater than -10^31-1 to be
represented in packed decimal format.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
---
 target-ppc/helper.h                 |  1 +
 target-ppc/int_helper.c             | 48 +++++++++++++++++++++++++++++++++++++
 target-ppc/translate/vmx-impl.inc.c |  7 ++++++
 3 files changed, 56 insertions(+)

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index da00f0a..87f533c 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -382,6 +382,7 @@ DEF_HELPER_3(bcdcfn, i32, avr, avr, i32)
 DEF_HELPER_3(bcdctn, i32, avr, avr, i32)
 DEF_HELPER_3(bcdcfz, i32, avr, avr, i32)
 DEF_HELPER_3(bcdctz, i32, avr, avr, i32)
+DEF_HELPER_3(bcdcfsq, i32, avr, avr, i32)
 
 DEF_HELPER_2(xsadddp, void, env, i32)
 DEF_HELPER_2(xssubdp, void, env, i32)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 9ac204a..db65a51 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -2874,6 +2874,54 @@ uint32_t helper_bcdctz(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
     return cr;
 }
 
+uint32_t helper_bcdcfsq(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
+{
+    int i;
+    int cr = 0;
+    int ox_flag = 0;
+    uint64_t digit = 0;
+    uint64_t carry = 0;
+    uint64_t lo_value = 0;
+    uint64_t hi_value = 0;
+    uint64_t max = ULLONG_MAX;
+    ppc_avr_t ret = { .u64 = { 0, 0 } };
+
+    if (b->s64[HI_IDX] < 0) {
+        hi_value = -b->s64[HI_IDX];
+        lo_value = b->s64[LO_IDX];
+        bcd_put_digit(&ret, 0xD, 0);
+    } else if (b->s64[HI_IDX] == 0 && b->s64[LO_IDX] < 0) {
+        lo_value = -b->s64[LO_IDX];
+        bcd_put_digit(&ret, 0xD, 0);
+    } else {
+        hi_value = b->s64[HI_IDX];
+        lo_value = b->s64[LO_IDX];
+        bcd_put_digit(&ret, bcd_preferred_sgn(0, ps), 0);
+    }
+
+    if (unlikely(hi_value > 0x7e37be2022)) {
+        ox_flag = 1;
+    }
+
+    carry = hi_value;
+    for (i = 0; i < 32; i++, max /= 10, lo_value /= 10) {
+        digit = ((max % 10) * hi_value) + (lo_value % 10) + carry;
+        carry = (digit > 9) ? digit / 10 : 0;
+
+        bcd_put_digit(&ret, (carry) ? digit % 10 : digit, i + 1);
+    }
+
+    cr = bcd_cmp_zero(&ret);
+
+    if (unlikely(ox_flag)) {
+        cr |= 1 << CRF_SO;
+    }
+
+    *r = ret;
+
+    return cr;
+}
+
 void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
 {
     int i;
diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c
index 7143eb3..36141e5 100644
--- a/target-ppc/translate/vmx-impl.inc.c
+++ b/target-ppc/translate/vmx-impl.inc.c
@@ -989,10 +989,14 @@ GEN_BCD2(bcdcfn)
 GEN_BCD2(bcdctn)
 GEN_BCD2(bcdcfz)
 GEN_BCD2(bcdctz)
+GEN_BCD2(bcdcfsq)
 
 static void gen_xpnd04_1(DisasContext *ctx)
 {
     switch (opc4(ctx->opcode)) {
+    case 2:
+        gen_bcdcfsq(ctx);
+        break;
     case 4:
         gen_bcdctz(ctx);
         break;
@@ -1014,6 +1018,9 @@ static void gen_xpnd04_1(DisasContext *ctx)
 static void gen_xpnd04_2(DisasContext *ctx)
 {
     switch (opc4(ctx->opcode)) {
+    case 2:
+        gen_bcdcfsq(ctx);
+        break;
     case 4:
         gen_bcdctz(ctx);
         break;
-- 
2.7.4

  reply	other threads:[~2016-11-16 20:08 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-16 20:07 [Qemu-devel] [PATCH 0/4] POWER9 TCG enablements - BCD functions part II Jose Ricardo Ziviani
2016-11-16 20:07 ` Jose Ricardo Ziviani [this message]
2016-11-17  3:42   ` [Qemu-devel] [PATCH 1/4] target-ppc: Implement bcdcfsq. instruction David Gibson
2016-11-17 17:31     ` joserz
2016-11-17 23:11       ` David Gibson
2016-11-16 20:07 ` [Qemu-devel] [PATCH 2/4] target-ppc: Implement bcdctsq. instruction Jose Ricardo Ziviani
2016-11-17  4:12   ` David Gibson
2016-11-16 20:07 ` [Qemu-devel] [PATCH 3/4] target-ppc: Implement bcdcpsgn. instruction Jose Ricardo Ziviani
2016-11-17  4:16   ` David Gibson
2016-11-16 20:07 ` [Qemu-devel] [PATCH 4/4] target-ppc: Implement bcdsetsgn. instruction Jose Ricardo Ziviani
2016-11-17  4:17   ` David Gibson

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