* Re: [PATCH] drm/i915: Moving scaler numbers to runtime init
2016-11-22 10:56 [PATCH] drm/i915: Moving scaler numbers to runtime init Nabendu Maiti
@ 2016-11-22 10:52 ` Chris Wilson
2016-11-22 11:15 ` ✓ Fi.CI.BAT: success for " Patchwork
` (6 subsequent siblings)
7 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2016-11-22 10:52 UTC (permalink / raw)
To: Nabendu Maiti; +Cc: intel-gfx
On Tue, Nov 22, 2016 at 04:26:18PM +0530, Nabendu Maiti wrote:
> Numbers of scalers initialization is moved to runtime init for platform
> specific initialization.
>
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
> drivers/gpu/drm/i915/intel_display.c | 10 ++--------
> drivers/gpu/drm/i915/intel_drv.h | 4 ++--
> 5 files changed, 9 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index b7f42c4..8349abe 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3080,7 +3080,7 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *intel_crtc)
> pipe_config->scaler_state.scaler_users,
> pipe_config->scaler_state.scaler_id);
>
> - for (i = 0; i < SKL_NUM_SCALERS; i++) {
> + for (i = 0; i < num_scalers; i++) {
> struct intel_scaler *sc =
> &pipe_config->scaler_state.scalers[i];
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index be67aee..6eed9c2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -731,6 +731,7 @@ struct intel_device_info {
> u16 device_id;
> u8 num_pipes;
> u8 num_sprites[I915_MAX_PIPES];
> + u8 num_scalers[I915_MAX_PIPES];
> u8 gen;
> u16 gen_mask;
> u8 ring_mask; /* Rings supported by the HW */
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 185e3bb..9b8dc71 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> info->num_sprites[PIPE_A] = 2;
> info->num_sprites[PIPE_B] = 2;
> info->num_sprites[PIPE_C] = 1;
> + info->num_scalers[PIPE_A] = 2;
> + info->num_scalers[PIPE_B] = 2;
> + info->num_sprites[PIPE_C] = 1;
Since this contains a cut-n-paste typo that wasn't picked up by BAT,
please fix both.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH] drm/i915: Moving scaler numbers to runtime init
@ 2016-11-22 10:56 Nabendu Maiti
2016-11-22 10:52 ` Chris Wilson
` (7 more replies)
0 siblings, 8 replies; 24+ messages in thread
From: Nabendu Maiti @ 2016-11-22 10:56 UTC (permalink / raw)
To: intel-gfx
Numbers of scalers initialization is moved to runtime init for platform
specific initialization.
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
drivers/gpu/drm/i915/intel_display.c | 10 ++--------
drivers/gpu/drm/i915/intel_drv.h | 4 ++--
5 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index b7f42c4..8349abe 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3080,7 +3080,7 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *intel_crtc)
pipe_config->scaler_state.scaler_users,
pipe_config->scaler_state.scaler_id);
- for (i = 0; i < SKL_NUM_SCALERS; i++) {
+ for (i = 0; i < num_scalers; i++) {
struct intel_scaler *sc =
&pipe_config->scaler_state.scalers[i];
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index be67aee..6eed9c2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -731,6 +731,7 @@ struct intel_device_info {
u16 device_id;
u8 num_pipes;
u8 num_sprites[I915_MAX_PIPES];
+ u8 num_scalers[I915_MAX_PIPES];
u8 gen;
u16 gen_mask;
u8 ring_mask; /* Rings supported by the HW */
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 185e3bb..9b8dc71 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
info->num_sprites[PIPE_A] = 2;
info->num_sprites[PIPE_B] = 2;
info->num_sprites[PIPE_C] = 1;
+ info->num_scalers[PIPE_A] = 2;
+ info->num_scalers[PIPE_B] = 2;
+ info->num_sprites[PIPE_C] = 1;
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
for_each_pipe(dev_priv, pipe)
info->num_sprites[pipe] = 2;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bd2c99e..d2023c4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15269,14 +15269,8 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
crtc_state->base.crtc = &intel_crtc->base;
/* initialize shared scalers */
- if (INTEL_GEN(dev_priv) >= 9) {
- if (pipe == PIPE_C)
- intel_crtc->num_scalers = 1;
- else
- intel_crtc->num_scalers = SKL_NUM_SCALERS;
-
- skl_init_scalers(dev_priv, intel_crtc, crtc_state);
- }
+ intel_crtc->num_scalers = dev_priv->info.num_scalers[pipe];
+ skl_init_scalers(dev_priv, intel_crtc, crtc_state);
primary = intel_primary_plane_create(dev_priv, pipe);
if (IS_ERR(primary)) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cd132c2..3f89607 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -430,8 +430,8 @@ struct intel_scaler {
};
struct intel_crtc_scaler_state {
-#define SKL_NUM_SCALERS 2
- struct intel_scaler scalers[SKL_NUM_SCALERS];
+#define MAX_NUM_SCALERS 2
+ struct intel_scaler scalers[MAX_NUM_SCALERS];
/*
* scaler_users: keeps track of users requesting scalers on this crtc.
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 24+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init
2016-11-22 10:56 [PATCH] drm/i915: Moving scaler numbers to runtime init Nabendu Maiti
2016-11-22 10:52 ` Chris Wilson
@ 2016-11-22 11:15 ` Patchwork
2016-11-22 12:01 ` [PATCH] drm/i915: Moving no of scalers initialization " Nabendu Maiti
` (5 subsequent siblings)
7 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2016-11-22 11:15 UTC (permalink / raw)
To: Nabendu Maiti; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Moving scaler numbers to runtime init
URL : https://patchwork.freedesktop.org/series/15726/
State : success
== Summary ==
Series 15726v1 drm/i915: Moving scaler numbers to runtime init
https://patchwork.freedesktop.org/api/1.0/series/15726/revisions/1/mbox/
Test drv_module_reload_basic:
dmesg-warn -> PASS (fi-skl-6770hq)
fi-bdw-5557u total:244 pass:229 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:244 pass:204 dwarn:0 dfail:0 fail:0 skip:40
fi-bxt-t5700 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-j1900 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-n2820 total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32
fi-hsw-4770 total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
fi-hsw-4770r total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
fi-ilk-650 total:244 pass:191 dwarn:0 dfail:0 fail:0 skip:53
fi-kbl-7200u total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-skl-6260u total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:244 pass:223 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6700k total:244 pass:222 dwarn:1 dfail:0 fail:0 skip:21
fi-skl-6770hq total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32
fi-snb-2600 total:244 pass:211 dwarn:0 dfail:0 fail:0 skip:33
eeec5e7742b23082dd20523c8baa08fe495175e4 drm-intel-nightly: 2016y-11m-21d-18h-22m-22s UTC integration manifest
6f26d11 drm/i915: Moving scaler numbers to runtime init
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3076/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH] drm/i915: Moving no of scalers initialization to runtime init
2016-11-22 10:56 [PATCH] drm/i915: Moving scaler numbers to runtime init Nabendu Maiti
2016-11-22 10:52 ` Chris Wilson
2016-11-22 11:15 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2016-11-22 12:01 ` Nabendu Maiti
2016-11-22 15:35 ` Chris Wilson
2016-11-25 9:46 ` Nabendu Maiti
2016-11-22 12:15 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev2) Patchwork
` (4 subsequent siblings)
7 siblings, 2 replies; 24+ messages in thread
From: Nabendu Maiti @ 2016-11-22 12:01 UTC (permalink / raw)
To: intel-gfx
Number of scalers initialization is moved to runtime init from
intel_crtc_init for platform specific initialization.
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
drivers/gpu/drm/i915/intel_display.c | 10 ++--------
drivers/gpu/drm/i915/intel_drv.h | 4 ++--
5 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index b7f42c4..8349abe 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3080,7 +3080,7 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *intel_crtc)
pipe_config->scaler_state.scaler_users,
pipe_config->scaler_state.scaler_id);
- for (i = 0; i < SKL_NUM_SCALERS; i++) {
+ for (i = 0; i < num_scalers; i++) {
struct intel_scaler *sc =
&pipe_config->scaler_state.scalers[i];
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index be67aee..6eed9c2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -731,6 +731,7 @@ struct intel_device_info {
u16 device_id;
u8 num_pipes;
u8 num_sprites[I915_MAX_PIPES];
+ u8 num_scalers[I915_MAX_PIPES];
u8 gen;
u16 gen_mask;
u8 ring_mask; /* Rings supported by the HW */
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 185e3bb..ef26fa8 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
info->num_sprites[PIPE_A] = 2;
info->num_sprites[PIPE_B] = 2;
info->num_sprites[PIPE_C] = 1;
+ info->num_scalers[PIPE_A] = 2;
+ info->num_scalers[PIPE_B] = 2;
+ info->num_scalers[PIPE_C] = 1;
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
for_each_pipe(dev_priv, pipe)
info->num_sprites[pipe] = 2;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bd2c99e..d2023c4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15269,14 +15269,8 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
crtc_state->base.crtc = &intel_crtc->base;
/* initialize shared scalers */
- if (INTEL_GEN(dev_priv) >= 9) {
- if (pipe == PIPE_C)
- intel_crtc->num_scalers = 1;
- else
- intel_crtc->num_scalers = SKL_NUM_SCALERS;
-
- skl_init_scalers(dev_priv, intel_crtc, crtc_state);
- }
+ intel_crtc->num_scalers = dev_priv->info.num_scalers[pipe];
+ skl_init_scalers(dev_priv, intel_crtc, crtc_state);
primary = intel_primary_plane_create(dev_priv, pipe);
if (IS_ERR(primary)) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cd132c2..3f89607 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -430,8 +430,8 @@ struct intel_scaler {
};
struct intel_crtc_scaler_state {
-#define SKL_NUM_SCALERS 2
- struct intel_scaler scalers[SKL_NUM_SCALERS];
+#define MAX_NUM_SCALERS 2
+ struct intel_scaler scalers[MAX_NUM_SCALERS];
/*
* scaler_users: keeps track of users requesting scalers on this crtc.
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 24+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev2)
2016-11-22 10:56 [PATCH] drm/i915: Moving scaler numbers to runtime init Nabendu Maiti
` (2 preceding siblings ...)
2016-11-22 12:01 ` [PATCH] drm/i915: Moving no of scalers initialization " Nabendu Maiti
@ 2016-11-22 12:15 ` Patchwork
2016-11-23 14:16 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev3) Patchwork
` (3 subsequent siblings)
7 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2016-11-22 12:15 UTC (permalink / raw)
To: Nabendu Maiti; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Moving scaler numbers to runtime init (rev2)
URL : https://patchwork.freedesktop.org/series/15726/
State : success
== Summary ==
Series 15726v2 drm/i915: Moving scaler numbers to runtime init
https://patchwork.freedesktop.org/api/1.0/series/15726/revisions/2/mbox/
Test drv_module_reload_basic:
dmesg-warn -> PASS (fi-skl-6770hq)
fi-bdw-5557u total:244 pass:229 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:244 pass:204 dwarn:0 dfail:0 fail:0 skip:40
fi-bxt-t5700 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-j1900 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-n2820 total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32
fi-hsw-4770 total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
fi-hsw-4770r total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
fi-ilk-650 total:244 pass:191 dwarn:0 dfail:0 fail:0 skip:53
fi-ivb-3520m total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-ivb-3770 total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-kbl-7200u total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-skl-6260u total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:244 pass:223 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6700k total:244 pass:222 dwarn:1 dfail:0 fail:0 skip:21
fi-skl-6770hq total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32
fi-snb-2600 total:244 pass:211 dwarn:0 dfail:0 fail:0 skip:33
eeec5e7742b23082dd20523c8baa08fe495175e4 drm-intel-nightly: 2016y-11m-21d-18h-22m-22s UTC integration manifest
2f48c37 drm/i915: Moving no of scalers initialization to runtime init
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3077/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH] drm/i915: Moving no of scalers initialization to runtime init
2016-11-22 12:01 ` [PATCH] drm/i915: Moving no of scalers initialization " Nabendu Maiti
@ 2016-11-22 15:35 ` Chris Wilson
2016-11-23 12:42 ` Maiti, Nabendu Bikash
2016-11-25 9:46 ` Nabendu Maiti
1 sibling, 1 reply; 24+ messages in thread
From: Chris Wilson @ 2016-11-22 15:35 UTC (permalink / raw)
To: Nabendu Maiti; +Cc: intel-gfx
On Tue, Nov 22, 2016 at 05:31:05PM +0530, Nabendu Maiti wrote:
Try to avoid confusing contractions (i.e. no no) and give us a verb in
that sentence in that Subject line.
> Number of scalers initialization is moved to runtime init from
> intel_crtc_init for platform specific initialization.
so that... Tell us why!
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
> drivers/gpu/drm/i915/intel_display.c | 10 ++--------
> drivers/gpu/drm/i915/intel_drv.h | 4 ++--
> 5 files changed, 9 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index b7f42c4..8349abe 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3080,7 +3080,7 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *intel_crtc)
> pipe_config->scaler_state.scaler_users,
> pipe_config->scaler_state.scaler_id);
>
> - for (i = 0; i < SKL_NUM_SCALERS; i++) {
> + for (i = 0; i < num_scalers; i++) {
> struct intel_scaler *sc =
> &pipe_config->scaler_state.scalers[i];
Already applied.
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index be67aee..6eed9c2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -731,6 +731,7 @@ struct intel_device_info {
> u16 device_id;
> u8 num_pipes;
> u8 num_sprites[I915_MAX_PIPES];
> + u8 num_scalers[I915_MAX_PIPES];
> u8 gen;
> u16 gen_mask;
> u8 ring_mask; /* Rings supported by the HW */
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 185e3bb..ef26fa8 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> info->num_sprites[PIPE_A] = 2;
> info->num_sprites[PIPE_B] = 2;
> info->num_sprites[PIPE_C] = 1;
> + info->num_scalers[PIPE_A] = 2;
> + info->num_scalers[PIPE_B] = 2;
> + info->num_scalers[PIPE_C] = 1;
> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> for_each_pipe(dev_priv, pipe)
> info->num_sprites[pipe] = 2;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index bd2c99e..d2023c4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15269,14 +15269,8 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
> crtc_state->base.crtc = &intel_crtc->base;
>
> /* initialize shared scalers */
> - if (INTEL_GEN(dev_priv) >= 9) {
> - if (pipe == PIPE_C)
> - intel_crtc->num_scalers = 1;
> - else
> - intel_crtc->num_scalers = SKL_NUM_SCALERS;
> -
> - skl_init_scalers(dev_priv, intel_crtc, crtc_state);
> - }
> + intel_crtc->num_scalers = dev_priv->info.num_scalers[pipe];
Double space after =.
> + skl_init_scalers(dev_priv, intel_crtc, crtc_state);
Now called for everybody, not just gen9+. Why? Is it safe? If it was
safe it would not be called skl_*(). intel_crtc->num_scalers is now a
candidate for including in init_scalers().
> primary = intel_primary_plane_create(dev_priv, pipe);
> if (IS_ERR(primary)) {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index cd132c2..3f89607 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -430,8 +430,8 @@ struct intel_scaler {
> };
>
> struct intel_crtc_scaler_state {
> -#define SKL_NUM_SCALERS 2
> - struct intel_scaler scalers[SKL_NUM_SCALERS];
> +#define MAX_NUM_SCALERS 2
> + struct intel_scaler scalers[MAX_NUM_SCALERS];
Replaced the gen marker rather than the abreviation. So now we have
what reads as NUM_NUM_SCALERS.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH] drm/i915: Moving no of scalers initialization to runtime init
2016-11-22 15:35 ` Chris Wilson
@ 2016-11-23 12:42 ` Maiti, Nabendu Bikash
2016-11-23 13:57 ` [PATCH] drm/i915: Move number " Nabendu Maiti
0 siblings, 1 reply; 24+ messages in thread
From: Maiti, Nabendu Bikash @ 2016-11-23 12:42 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 11/22/2016 9:05 PM, Chris Wilson wrote:
> On Tue, Nov 22, 2016 at 05:31:05PM +0530, Nabendu Maiti wrote:
>
> Try to avoid confusing contractions (i.e. no no) and give us a verb in
> that sentence in that Subject line.
>
>> Number of scalers initialization is moved to runtime init from
>> intel_crtc_init for platform specific initialization.
>
> so that... Tell us why!
Next patch set.
>
>> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
>> drivers/gpu/drm/i915/i915_drv.h | 1 +
>> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
>> drivers/gpu/drm/i915/intel_display.c | 10 ++--------
>> drivers/gpu/drm/i915/intel_drv.h | 4 ++--
>> 5 files changed, 9 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index b7f42c4..8349abe 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -3080,7 +3080,7 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *intel_crtc)
>> pipe_config->scaler_state.scaler_users,
>> pipe_config->scaler_state.scaler_id);
>>
>> - for (i = 0; i < SKL_NUM_SCALERS; i++) {
>> + for (i = 0; i < num_scalers; i++) {
>> struct intel_scaler *sc =
>> &pipe_config->scaler_state.scalers[i];
>
> Already applied.
>
Removed from this patch.
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index be67aee..6eed9c2 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -731,6 +731,7 @@ struct intel_device_info {
>> u16 device_id;
>> u8 num_pipes;
>> u8 num_sprites[I915_MAX_PIPES];
>> + u8 num_scalers[I915_MAX_PIPES];
>> u8 gen;
>> u16 gen_mask;
>> u8 ring_mask; /* Rings supported by the HW */
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>> index 185e3bb..ef26fa8 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>> @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
>> info->num_sprites[PIPE_A] = 2;
>> info->num_sprites[PIPE_B] = 2;
>> info->num_sprites[PIPE_C] = 1;
>> + info->num_scalers[PIPE_A] = 2;
>> + info->num_scalers[PIPE_B] = 2;
>> + info->num_scalers[PIPE_C] = 1;
>> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>> for_each_pipe(dev_priv, pipe)
>> info->num_sprites[pipe] = 2;
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index bd2c99e..d2023c4 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -15269,14 +15269,8 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
>> crtc_state->base.crtc = &intel_crtc->base;
>>
>> /* initialize shared scalers */
>> - if (INTEL_GEN(dev_priv) >= 9) {
>> - if (pipe == PIPE_C)
>> - intel_crtc->num_scalers = 1;
>> - else
>> - intel_crtc->num_scalers = SKL_NUM_SCALERS;
>> -
>> - skl_init_scalers(dev_priv, intel_crtc, crtc_state);
>> - }
>> + intel_crtc->num_scalers = dev_priv->info.num_scalers[pipe];
>
> Double space after =.
>
Done.
>> + skl_init_scalers(dev_priv, intel_crtc, crtc_state);
>
> Now called for everybody, not just gen9+. Why? Is it safe? If it was
> safe it would not be called skl_*(). intel_crtc->num_scalers is now a
> candidate for including in init_scalers().
>
Added check on numbers of scalers in each crtc in next version. If no
scaler, return without initialization. Also can move skl_init_scalers to
below plane initialization. Scaler is not utilized upto this point.
In next patches will change the function names more generic.
>> primary = intel_primary_plane_create(dev_priv, pipe);
>> if (IS_ERR(primary)) {
>> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>> index cd132c2..3f89607 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -430,8 +430,8 @@ struct intel_scaler {
>> };
>>
>> struct intel_crtc_scaler_state {
>> -#define SKL_NUM_SCALERS 2
>> - struct intel_scaler scalers[SKL_NUM_SCALERS];
>> +#define MAX_NUM_SCALERS 2
>> + struct intel_scaler scalers[MAX_NUM_SCALERS];
>
> Replaced the gen marker rather than the abreviation. So now we have
> what reads as NUM_NUM_SCALERS.
>
Reverting to original SKL_NUM_SCALERS, Will give more generic name later.
-Chris
>
--
Regards,
Nabendu
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH] drm/i915: Move number of scalers initialization to runtime init
2016-11-23 12:42 ` Maiti, Nabendu Bikash
@ 2016-11-23 13:57 ` Nabendu Maiti
0 siblings, 0 replies; 24+ messages in thread
From: Nabendu Maiti @ 2016-11-23 13:57 UTC (permalink / raw)
To: intel-gfx
In future patches, we require greater flexibility in describing
the number of scalers available on each CRTC. To ease that transition
we move the current assignment to intel_device_info. Scaler structure
initialisation is done if scaler is available on the CRTC.
Gen9 check is not required as depending on numbers of scalers we
initialize scalers or return without doing anything in skl_init_scalers.
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
drivers/gpu/drm/i915/intel_display.c | 18 ++++++++----------
4 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index b7f42c4..8349abe 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3080,7 +3080,7 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *intel_crtc)
pipe_config->scaler_state.scaler_users,
pipe_config->scaler_state.scaler_id);
- for (i = 0; i < SKL_NUM_SCALERS; i++) {
+ for (i = 0; i < num_scalers; i++) {
struct intel_scaler *sc =
&pipe_config->scaler_state.scalers[i];
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index be67aee..6eed9c2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -731,6 +731,7 @@ struct intel_device_info {
u16 device_id;
u8 num_pipes;
u8 num_sprites[I915_MAX_PIPES];
+ u8 num_scalers[I915_MAX_PIPES];
u8 gen;
u16 gen_mask;
u8 ring_mask; /* Rings supported by the HW */
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 185e3bb..ef26fa8 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
info->num_sprites[PIPE_A] = 2;
info->num_sprites[PIPE_B] = 2;
info->num_sprites[PIPE_C] = 1;
+ info->num_scalers[PIPE_A] = 2;
+ info->num_scalers[PIPE_B] = 2;
+ info->num_scalers[PIPE_C] = 1;
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
for_each_pipe(dev_priv, pipe)
info->num_sprites[pipe] = 2;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bd2c99e..331131d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15237,6 +15237,11 @@ static void skl_init_scalers(struct drm_i915_private *dev_priv,
&crtc_state->scaler_state;
int i;
+ crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
+
+ if (!crtc->num_scalers)
+ return;
+
for (i = 0; i < crtc->num_scalers; i++) {
struct intel_scaler *scaler = &scaler_state->scalers[i];
@@ -15268,16 +15273,6 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
intel_crtc->base.state = &crtc_state->base;
crtc_state->base.crtc = &intel_crtc->base;
- /* initialize shared scalers */
- if (INTEL_GEN(dev_priv) >= 9) {
- if (pipe == PIPE_C)
- intel_crtc->num_scalers = 1;
- else
- intel_crtc->num_scalers = SKL_NUM_SCALERS;
-
- skl_init_scalers(dev_priv, intel_crtc, crtc_state);
- }
-
primary = intel_primary_plane_create(dev_priv, pipe);
if (IS_ERR(primary)) {
ret = PTR_ERR(primary);
@@ -15316,6 +15311,9 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
intel_crtc->wm.cxsr_allowed = true;
+ /* initialize shared scalers */
+ skl_init_scalers(dev_priv, intel_crtc, crtc_state);
+
BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 24+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev3)
2016-11-22 10:56 [PATCH] drm/i915: Moving scaler numbers to runtime init Nabendu Maiti
` (3 preceding siblings ...)
2016-11-22 12:15 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev2) Patchwork
@ 2016-11-23 14:16 ` Patchwork
2016-11-25 10:45 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev4) Patchwork
` (2 subsequent siblings)
7 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2016-11-23 14:16 UTC (permalink / raw)
To: Nabendu Maiti; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Moving scaler numbers to runtime init (rev3)
URL : https://patchwork.freedesktop.org/series/15726/
State : success
== Summary ==
Series 15726v3 drm/i915: Moving scaler numbers to runtime init
https://patchwork.freedesktop.org/api/1.0/series/15726/revisions/3/mbox/
fi-bdw-5557u total:244 pass:229 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:244 pass:204 dwarn:0 dfail:0 fail:0 skip:40
fi-bxt-t5700 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-j1900 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-n2820 total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32
fi-hsw-4770 total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
fi-hsw-4770r total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
fi-ilk-650 total:244 pass:191 dwarn:0 dfail:0 fail:0 skip:53
fi-ivb-3520m total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-ivb-3770 total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-kbl-7200u total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-skl-6260u total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:244 pass:223 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6700k total:244 pass:222 dwarn:1 dfail:0 fail:0 skip:21
fi-skl-6770hq total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32
fi-snb-2600 total:244 pass:211 dwarn:0 dfail:0 fail:0 skip:33
e982799174795e1cccb77845051722c1616c03fd drm-intel-nightly: 2016y-11m-23d-11h-32m-46s UTC integration manifest
78aefd1 drm/i915: Move number of scalers initialization to runtime init
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3091/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH] drm/i915: Move number of scalers initialization to runtime init
2016-11-25 9:46 ` Nabendu Maiti
@ 2016-11-25 9:44 ` Chris Wilson
2016-11-25 10:32 ` Maiti, Nabendu Bikash
2016-11-29 5:53 ` [PATCH v3] " Nabendu Maiti
1 sibling, 1 reply; 24+ messages in thread
From: Chris Wilson @ 2016-11-25 9:44 UTC (permalink / raw)
To: Nabendu Maiti; +Cc: intel-gfx
On Fri, Nov 25, 2016 at 03:16:58PM +0530, Nabendu Maiti wrote:
> In future patches, we require greater flexibility in describing
> the number of scalers available on each CRTC. To ease that transition
> we move the current assignment to intel_device_info.
>
> Scaler structure initialisation is done if scaler is available on the CRTC.
> Gen9 check is not required as on depending upon numbers of scalers we
> initialize scalers or return without doing anything in skl_init_scalers.
>
> v2: Added Chris's commenents.
comments :)
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
> drivers/gpu/drm/i915/intel_display.c | 18 ++++++++----------
> 3 files changed, 12 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 1ec9619..bb8c5f0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -758,6 +758,7 @@ struct intel_device_info {
> u16 device_id;
> u8 num_pipes;
> u8 num_sprites[I915_MAX_PIPES];
> + u8 num_scalers[I915_MAX_PIPES];
> u8 gen;
> u16 gen_mask;
> u8 ring_mask; /* Rings supported by the HW */
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 185e3bb..ef26fa8 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> info->num_sprites[PIPE_A] = 2;
> info->num_sprites[PIPE_B] = 2;
> info->num_sprites[PIPE_C] = 1;
> + info->num_scalers[PIPE_A] = 2;
> + info->num_scalers[PIPE_B] = 2;
> + info->num_scalers[PIPE_C] = 1;
> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> for_each_pipe(dev_priv, pipe)
> info->num_sprites[pipe] = 2;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5d11002..2062170 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -15266,6 +15266,11 @@ static void skl_init_scalers(struct drm_i915_private *dev_priv,
> &crtc_state->scaler_state;
> int i;
>
> + crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
> +
Blank here is overkill
> + if (!crtc->num_scalers)
> + return;
> +
crtc->num_scalers = <info>;
if (!ctrc->num_scalers)
return;
is quite clean.
> for (i = 0; i < crtc->num_scalers; i++) {
> struct intel_scaler *scaler = &scaler_state->scalers[i];
>
> @@ -15297,16 +15302,6 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
> intel_crtc->base.state = &crtc_state->base;
> crtc_state->base.crtc = &intel_crtc->base;
>
> - /* initialize shared scalers */
> - if (INTEL_GEN(dev_priv) >= 9) {
> - if (pipe == PIPE_C)
> - intel_crtc->num_scalers = 1;
> - else
> - intel_crtc->num_scalers = SKL_NUM_SCALERS;
> -
> - skl_init_scalers(dev_priv, intel_crtc, crtc_state);
> - }
> -
> primary = intel_primary_plane_create(dev_priv, pipe);
> if (IS_ERR(primary)) {
> ret = PTR_ERR(primary);
> @@ -15348,6 +15343,9 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
>
> intel_crtc->wm.cxsr_allowed = true;
>
> + /* initialize shared scalers */
> + skl_init_scalers(dev_priv, intel_crtc, crtc_state);
As this is now called by all, it really should be
intel_crtc_init_scalers() and we only need to pass intel_crtc at this
point.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH] drm/i915: Move number of scalers initialization to runtime init
2016-11-22 12:01 ` [PATCH] drm/i915: Moving no of scalers initialization " Nabendu Maiti
2016-11-22 15:35 ` Chris Wilson
@ 2016-11-25 9:46 ` Nabendu Maiti
2016-11-25 9:44 ` Chris Wilson
2016-11-29 5:53 ` [PATCH v3] " Nabendu Maiti
1 sibling, 2 replies; 24+ messages in thread
From: Nabendu Maiti @ 2016-11-25 9:46 UTC (permalink / raw)
To: intel-gfx
In future patches, we require greater flexibility in describing
the number of scalers available on each CRTC. To ease that transition
we move the current assignment to intel_device_info.
Scaler structure initialisation is done if scaler is available on the CRTC.
Gen9 check is not required as on depending upon numbers of scalers we
initialize scalers or return without doing anything in skl_init_scalers.
v2: Added Chris's commenents.
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
drivers/gpu/drm/i915/intel_display.c | 18 ++++++++----------
3 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1ec9619..bb8c5f0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -758,6 +758,7 @@ struct intel_device_info {
u16 device_id;
u8 num_pipes;
u8 num_sprites[I915_MAX_PIPES];
+ u8 num_scalers[I915_MAX_PIPES];
u8 gen;
u16 gen_mask;
u8 ring_mask; /* Rings supported by the HW */
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 185e3bb..ef26fa8 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
info->num_sprites[PIPE_A] = 2;
info->num_sprites[PIPE_B] = 2;
info->num_sprites[PIPE_C] = 1;
+ info->num_scalers[PIPE_A] = 2;
+ info->num_scalers[PIPE_B] = 2;
+ info->num_scalers[PIPE_C] = 1;
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
for_each_pipe(dev_priv, pipe)
info->num_sprites[pipe] = 2;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5d11002..2062170 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15266,6 +15266,11 @@ static void skl_init_scalers(struct drm_i915_private *dev_priv,
&crtc_state->scaler_state;
int i;
+ crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
+
+ if (!crtc->num_scalers)
+ return;
+
for (i = 0; i < crtc->num_scalers; i++) {
struct intel_scaler *scaler = &scaler_state->scalers[i];
@@ -15297,16 +15302,6 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
intel_crtc->base.state = &crtc_state->base;
crtc_state->base.crtc = &intel_crtc->base;
- /* initialize shared scalers */
- if (INTEL_GEN(dev_priv) >= 9) {
- if (pipe == PIPE_C)
- intel_crtc->num_scalers = 1;
- else
- intel_crtc->num_scalers = SKL_NUM_SCALERS;
-
- skl_init_scalers(dev_priv, intel_crtc, crtc_state);
- }
-
primary = intel_primary_plane_create(dev_priv, pipe);
if (IS_ERR(primary)) {
ret = PTR_ERR(primary);
@@ -15348,6 +15343,9 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
intel_crtc->wm.cxsr_allowed = true;
+ /* initialize shared scalers */
+ skl_init_scalers(dev_priv, intel_crtc, crtc_state);
+
BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH] drm/i915: Move number of scalers initialization to runtime init
2016-11-25 9:44 ` Chris Wilson
@ 2016-11-25 10:32 ` Maiti, Nabendu Bikash
0 siblings, 0 replies; 24+ messages in thread
From: Maiti, Nabendu Bikash @ 2016-11-25 10:32 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 11/25/2016 3:14 PM, Chris Wilson wrote:
> On Fri, Nov 25, 2016 at 03:16:58PM +0530, Nabendu Maiti wrote:
>> In future patches, we require greater flexibility in describing
>> the number of scalers available on each CRTC. To ease that transition
>> we move the current assignment to intel_device_info.
>>
>> Scaler structure initialisation is done if scaler is available on the CRTC.
>> Gen9 check is not required as on depending upon numbers of scalers we
>> initialize scalers or return without doing anything in skl_init_scalers.
>>
>> v2: Added Chris's commenents.
> comments :)
Accepted. :)
>
>> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
>
>> ---
>> drivers/gpu/drm/i915/i915_drv.h | 1 +
>> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
>> drivers/gpu/drm/i915/intel_display.c | 18 ++++++++----------
>> 3 files changed, 12 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 1ec9619..bb8c5f0 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -758,6 +758,7 @@ struct intel_device_info {
>> u16 device_id;
>> u8 num_pipes;
>> u8 num_sprites[I915_MAX_PIPES];
>> + u8 num_scalers[I915_MAX_PIPES];
>> u8 gen;
>> u16 gen_mask;
>> u8 ring_mask; /* Rings supported by the HW */
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>> index 185e3bb..ef26fa8 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>> @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
>> info->num_sprites[PIPE_A] = 2;
>> info->num_sprites[PIPE_B] = 2;
>> info->num_sprites[PIPE_C] = 1;
>> + info->num_scalers[PIPE_A] = 2;
>> + info->num_scalers[PIPE_B] = 2;
>> + info->num_scalers[PIPE_C] = 1;
>> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>> for_each_pipe(dev_priv, pipe)
>> info->num_sprites[pipe] = 2;
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index 5d11002..2062170 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -15266,6 +15266,11 @@ static void skl_init_scalers(struct drm_i915_private *dev_priv,
>> &crtc_state->scaler_state;
>> int i;
>>
>> + crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
>> +
>
> Blank here is overkill
>
>> + if (!crtc->num_scalers)
>> + return;
>> +
>
> crtc->num_scalers = <info>;
> if (!ctrc->num_scalers)
> return;
>
> is quite clean.
Accepted.
>
>> for (i = 0; i < crtc->num_scalers; i++) {
>> struct intel_scaler *scaler = &scaler_state->scalers[i];
>>
>> @@ -15297,16 +15302,6 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
>> intel_crtc->base.state = &crtc_state->base;
>> crtc_state->base.crtc = &intel_crtc->base;
>>
>> - /* initialize shared scalers */
>> - if (INTEL_GEN(dev_priv) >= 9) {
>> - if (pipe == PIPE_C)
>> - intel_crtc->num_scalers = 1;
>> - else
>> - intel_crtc->num_scalers = SKL_NUM_SCALERS;
>> -
>> - skl_init_scalers(dev_priv, intel_crtc, crtc_state);
>> - }
>> -
>> primary = intel_primary_plane_create(dev_priv, pipe);
>> if (IS_ERR(primary)) {
>> ret = PTR_ERR(primary);
>> @@ -15348,6 +15343,9 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
>>
>> intel_crtc->wm.cxsr_allowed = true;
>>
>> + /* initialize shared scalers */
>> + skl_init_scalers(dev_priv, intel_crtc, crtc_state);
>
> As this is now called by all, it really should be
> intel_crtc_init_scalers() and we only need to pass intel_crtc at this
> point.
okey , changing to intel_crtc_init_scalers()
I think we can also potspone it later on by substituting skl_* by
intel_crtc_* or i9xx_crtc_*scaler in next patch. Cleanup needed for
skylake_pfit** and some other scaler functions.
Yes removing dev_priv as folllowing,
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); ?
But crtc_state need to to be passed, Apart from crtc_init ,
haswell_get_pipe_config also call it. We pass the current active
pipe_state. Not sure *config in intel_crtc will serve the same purpose
for both cases.
> -Chris
>
--
Regards,
Nabendu
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev4)
2016-11-22 10:56 [PATCH] drm/i915: Moving scaler numbers to runtime init Nabendu Maiti
` (4 preceding siblings ...)
2016-11-23 14:16 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev3) Patchwork
@ 2016-11-25 10:45 ` Patchwork
2016-11-29 6:15 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev5) Patchwork
2016-11-29 9:14 ` ✗ Fi.CI.BAT: warning " Patchwork
7 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2016-11-25 10:45 UTC (permalink / raw)
To: Nabendu Maiti; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Moving scaler numbers to runtime init (rev4)
URL : https://patchwork.freedesktop.org/series/15726/
State : success
== Summary ==
Series 15726v4 drm/i915: Moving scaler numbers to runtime init
https://patchwork.freedesktop.org/api/1.0/series/15726/revisions/4/mbox/
fi-bdw-5557u total:244 pass:229 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:244 pass:204 dwarn:0 dfail:0 fail:0 skip:40
fi-bxt-t5700 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-j1900 total:244 pass:216 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-n2820 total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32
fi-hsw-4770 total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
fi-hsw-4770r total:244 pass:224 dwarn:0 dfail:0 fail:0 skip:20
fi-ilk-650 total:244 pass:191 dwarn:0 dfail:0 fail:0 skip:53
fi-ivb-3520m total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-ivb-3770 total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-kbl-7200u total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-kbl-7500u total:244 pass:222 dwarn:0 dfail:0 fail:0 skip:22
fi-skl-6260u total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:244 pass:223 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6700k total:244 pass:222 dwarn:1 dfail:0 fail:0 skip:21
fi-skl-6770hq total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:244 pass:212 dwarn:0 dfail:0 fail:0 skip:32
fi-snb-2600 total:244 pass:211 dwarn:0 dfail:0 fail:0 skip:33
90e312d771441d1ec7bf3cd72620a3fe9a4aef82 drm-tip: 2016y-11m-25d-07h-11m-59s UTC integration manifest
cc74a9e drm/i915: Move number of scalers initialization to runtime init
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3113/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3] drm/i915: Move number of scalers initialization to runtime init
2016-11-25 9:46 ` Nabendu Maiti
2016-11-25 9:44 ` Chris Wilson
@ 2016-11-29 5:53 ` Nabendu Maiti
2016-12-26 11:00 ` Maiti, Nabendu Bikash
` (2 more replies)
1 sibling, 3 replies; 24+ messages in thread
From: Nabendu Maiti @ 2016-11-29 5:53 UTC (permalink / raw)
To: intel-gfx
In future patches, we require greater flexibility in describing
the number of scalers available on each CRTC. To ease that transition
we move the current assignment to intel_device_info.
Scaler structure initialisation is done if scaler is available on the CRTC.
Gen9 check is not required as on depending upon numbers of scalers we
initialize scalers or return without doing anything in skl_init_scalers.
v3: Changed skl_init_scaler to intel_crtc_init_scalers
v2: Added Chris's comments.
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +++
drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++---------------
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1ec9619..bb8c5f0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -758,6 +758,7 @@ struct intel_device_info {
u16 device_id;
u8 num_pipes;
u8 num_sprites[I915_MAX_PIPES];
+ u8 num_scalers[I915_MAX_PIPES];
u8 gen;
u16 gen_mask;
u8 ring_mask; /* Rings supported by the HW */
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 185e3bb..ef26fa8 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
info->num_sprites[PIPE_A] = 2;
info->num_sprites[PIPE_B] = 2;
info->num_sprites[PIPE_C] = 1;
+ info->num_scalers[PIPE_A] = 2;
+ info->num_scalers[PIPE_B] = 2;
+ info->num_scalers[PIPE_C] = 1;
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
for_each_pipe(dev_priv, pipe)
info->num_sprites[pipe] = 2;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5d11002..46de54a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -115,8 +115,7 @@ static void chv_prepare_pll(struct intel_crtc *crtc,
const struct intel_crtc_state *pipe_config);
static void intel_begin_crtc_commit(struct drm_crtc *, struct drm_crtc_state *);
static void intel_finish_crtc_commit(struct drm_crtc *, struct drm_crtc_state *);
-static void skl_init_scalers(struct drm_i915_private *dev_priv,
- struct intel_crtc *crtc,
+static void intel_crtc_init_scalers(struct intel_crtc *crtc,
struct intel_crtc_state *crtc_state);
static void skylake_pfit_enable(struct intel_crtc *crtc);
static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
@@ -10713,7 +10712,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
if (INTEL_GEN(dev_priv) >= 9) {
- skl_init_scalers(dev_priv, crtc, pipe_config);
+ intel_crtc_init_scalers(crtc, pipe_config);
pipe_config->scaler_state.scaler_id = -1;
pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
@@ -15258,14 +15257,18 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
return ERR_PTR(ret);
}
-static void skl_init_scalers(struct drm_i915_private *dev_priv,
- struct intel_crtc *crtc,
+static void intel_crtc_init_scalers(struct intel_crtc *crtc,
struct intel_crtc_state *crtc_state)
{
struct intel_crtc_scaler_state *scaler_state =
&crtc_state->scaler_state;
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i;
+ crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
+ if (!crtc->num_scalers)
+ return;
+
for (i = 0; i < crtc->num_scalers; i++) {
struct intel_scaler *scaler = &scaler_state->scalers[i];
@@ -15297,16 +15300,6 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
intel_crtc->base.state = &crtc_state->base;
crtc_state->base.crtc = &intel_crtc->base;
- /* initialize shared scalers */
- if (INTEL_GEN(dev_priv) >= 9) {
- if (pipe == PIPE_C)
- intel_crtc->num_scalers = 1;
- else
- intel_crtc->num_scalers = SKL_NUM_SCALERS;
-
- skl_init_scalers(dev_priv, intel_crtc, crtc_state);
- }
-
primary = intel_primary_plane_create(dev_priv, pipe);
if (IS_ERR(primary)) {
ret = PTR_ERR(primary);
@@ -15348,6 +15341,9 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
intel_crtc->wm.cxsr_allowed = true;
+ /* initialize shared scalers */
+ intel_crtc_init_scalers(intel_crtc, crtc_state);
+
BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 24+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev5)
2016-11-22 10:56 [PATCH] drm/i915: Moving scaler numbers to runtime init Nabendu Maiti
` (5 preceding siblings ...)
2016-11-25 10:45 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev4) Patchwork
@ 2016-11-29 6:15 ` Patchwork
2016-11-29 9:14 ` ✗ Fi.CI.BAT: warning " Patchwork
7 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2016-11-29 6:15 UTC (permalink / raw)
To: Nabendu Maiti; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Moving scaler numbers to runtime init (rev5)
URL : https://patchwork.freedesktop.org/series/15726/
State : success
== Summary ==
Series 15726v5 drm/i915: Moving scaler numbers to runtime init
https://patchwork.freedesktop.org/api/1.0/series/15726/revisions/5/mbox/
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-c-frame-sequence:
dmesg-warn -> PASS (fi-skl-6770hq)
fi-ilk-650 total:245 pass:192 dwarn:0 dfail:0 fail:0 skip:53
fi-skl-6260u total:245 pass:231 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:245 pass:224 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6700k total:245 pass:223 dwarn:1 dfail:0 fail:0 skip:21
fi-skl-6770hq total:245 pass:231 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:245 pass:213 dwarn:0 dfail:0 fail:0 skip:32
e9e1f8451437763fddfc9e53d008dcacd3ca2ad1 drm-tip: 2016y-11m-29d-04h-19m-22s UTC integration manifest
170cf97 drm/i915: Move number of scalers initialization to runtime init
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3131/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915: Moving scaler numbers to runtime init (rev5)
2016-11-22 10:56 [PATCH] drm/i915: Moving scaler numbers to runtime init Nabendu Maiti
` (6 preceding siblings ...)
2016-11-29 6:15 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev5) Patchwork
@ 2016-11-29 9:14 ` Patchwork
2016-11-29 9:26 ` Saarinen, Jani
7 siblings, 1 reply; 24+ messages in thread
From: Patchwork @ 2016-11-29 9:14 UTC (permalink / raw)
To: Nabendu Maiti; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Moving scaler numbers to runtime init (rev5)
URL : https://patchwork.freedesktop.org/series/15726/
State : warning
== Summary ==
Series 15726v5 drm/i915: Moving scaler numbers to runtime init
https://patchwork.freedesktop.org/api/1.0/series/15726/revisions/5/mbox/
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-a:
pass -> DMESG-WARN (fi-ilk-650)
fi-bdw-5557u total:245 pass:230 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:245 pass:205 dwarn:0 dfail:0 fail:0 skip:40
fi-bxt-t5700 total:245 pass:217 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-j1900 total:245 pass:217 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-n2820 total:245 pass:213 dwarn:0 dfail:0 fail:0 skip:32
fi-hsw-4770 total:245 pass:225 dwarn:0 dfail:0 fail:0 skip:20
fi-hsw-4770r total:245 pass:225 dwarn:0 dfail:0 fail:0 skip:20
fi-ilk-650 total:245 pass:191 dwarn:1 dfail:0 fail:0 skip:53
fi-ivb-3520m total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
fi-ivb-3770 total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
fi-kbl-7500u total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
fi-skl-6260u total:245 pass:231 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:245 pass:224 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6700k total:245 pass:223 dwarn:1 dfail:0 fail:0 skip:21
fi-snb-2520m total:245 pass:213 dwarn:0 dfail:0 fail:0 skip:32
fi-snb-2600 total:245 pass:212 dwarn:0 dfail:0 fail:0 skip:33
e9e1f8451437763fddfc9e53d008dcacd3ca2ad1 drm-tip: 2016y-11m-29d-04h-19m-22s UTC integration manifest
0ffa6c6 drm/i915: Move number of scalers initialization to runtime init
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3133/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: ✗ Fi.CI.BAT: warning for drm/i915: Moving scaler numbers to runtime init (rev5)
2016-11-29 9:14 ` ✗ Fi.CI.BAT: warning " Patchwork
@ 2016-11-29 9:26 ` Saarinen, Jani
2016-11-29 10:10 ` Maiti, Nabendu Bikash
0 siblings, 1 reply; 24+ messages in thread
From: Saarinen, Jani @ 2016-11-29 9:26 UTC (permalink / raw)
To: intel-gfx, Maiti, Nabendu Bikash
> == Series Details ==
>
> Series: drm/i915: Moving scaler numbers to runtime init (rev5)
> URL : https://patchwork.freedesktop.org/series/15726/
> State : warning
>
> == Summary ==
>
> Series 15726v5 drm/i915: Moving scaler numbers to runtime init
> https://patchwork.freedesktop.org/api/1.0/series/15726/revisions/5/mbo
> x/
>
> Test kms_pipe_crc_basic:
> Subgroup nonblocking-crc-pipe-a:
> pass -> DMESG-WARN (fi-ilk-650)
Still there:
https://bugs.freedesktop.org/show_bug.cgi?id=98251
Note this was re-run due to some CI issues not run on all systems.
> fi-bdw-5557u total:245 pass:230 dwarn:0 dfail:0 fail:0 skip:15
> fi-bsw-n3050 total:245 pass:205 dwarn:0 dfail:0 fail:0 skip:40
> fi-bxt-t5700 total:245 pass:217 dwarn:0 dfail:0 fail:0 skip:28
> fi-byt-j1900 total:245 pass:217 dwarn:0 dfail:0 fail:0 skip:28
> fi-byt-n2820 total:245 pass:213 dwarn:0 dfail:0 fail:0 skip:32
> fi-hsw-4770 total:245 pass:225 dwarn:0 dfail:0 fail:0 skip:20
> fi-hsw-4770r total:245 pass:225 dwarn:0 dfail:0 fail:0 skip:20
> fi-ilk-650 total:245 pass:191 dwarn:1 dfail:0 fail:0 skip:53
> fi-ivb-3520m total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
> fi-ivb-3770 total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
> fi-kbl-7500u total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
> fi-skl-6260u total:245 pass:231 dwarn:0 dfail:0 fail:0 skip:14
> fi-skl-6700hq total:245 pass:224 dwarn:0 dfail:0 fail:0 skip:21
> fi-skl-6700k total:245 pass:223 dwarn:1 dfail:0 fail:0 skip:21
> fi-snb-2520m total:245 pass:213 dwarn:0 dfail:0 fail:0 skip:32
> fi-snb-2600 total:245 pass:212 dwarn:0 dfail:0 fail:0 skip:33
>
> e9e1f8451437763fddfc9e53d008dcacd3ca2ad1 drm-tip: 2016y-11m-29d-
> 04h-19m-22s UTC integration manifest
> 0ffa6c6 drm/i915: Move number of scalers initialization to runtime init
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3133/
Jani Saarinen
Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: ✗ Fi.CI.BAT: warning for drm/i915: Moving scaler numbers to runtime init (rev5)
2016-11-29 9:26 ` Saarinen, Jani
@ 2016-11-29 10:10 ` Maiti, Nabendu Bikash
2016-11-29 10:14 ` Saarinen, Jani
0 siblings, 1 reply; 24+ messages in thread
From: Maiti, Nabendu Bikash @ 2016-11-29 10:10 UTC (permalink / raw)
To: Saarinen, Jani, intel-gfx
Its probably false alarm. Fifo underrun is not related to this patch.
On 11/29/2016 2:56 PM, Saarinen, Jani wrote:
>> == Series Details ==
>>
>> Series: drm/i915: Moving scaler numbers to runtime init (rev5)
>> URL : https://patchwork.freedesktop.org/series/15726/
>> State : warning
>>
>> == Summary ==
>>
>> Series 15726v5 drm/i915: Moving scaler numbers to runtime init
>> https://patchwork.freedesktop.org/api/1.0/series/15726/revisions/5/mbo
>> x/
>>
>> Test kms_pipe_crc_basic:
>> Subgroup nonblocking-crc-pipe-a:
>> pass -> DMESG-WARN (fi-ilk-650)
> Still there:
> https://bugs.freedesktop.org/show_bug.cgi?id=98251
> Note this was re-run due to some CI issues not run on all systems.
>
>> fi-bdw-5557u total:245 pass:230 dwarn:0 dfail:0 fail:0 skip:15
>> fi-bsw-n3050 total:245 pass:205 dwarn:0 dfail:0 fail:0 skip:40
>> fi-bxt-t5700 total:245 pass:217 dwarn:0 dfail:0 fail:0 skip:28
>> fi-byt-j1900 total:245 pass:217 dwarn:0 dfail:0 fail:0 skip:28
>> fi-byt-n2820 total:245 pass:213 dwarn:0 dfail:0 fail:0 skip:32
>> fi-hsw-4770 total:245 pass:225 dwarn:0 dfail:0 fail:0 skip:20
>> fi-hsw-4770r total:245 pass:225 dwarn:0 dfail:0 fail:0 skip:20
>> fi-ilk-650 total:245 pass:191 dwarn:1 dfail:0 fail:0 skip:53
>> fi-ivb-3520m total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
>> fi-ivb-3770 total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
>> fi-kbl-7500u total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
>> fi-skl-6260u total:245 pass:231 dwarn:0 dfail:0 fail:0 skip:14
>> fi-skl-6700hq total:245 pass:224 dwarn:0 dfail:0 fail:0 skip:21
>> fi-skl-6700k total:245 pass:223 dwarn:1 dfail:0 fail:0 skip:21
>> fi-snb-2520m total:245 pass:213 dwarn:0 dfail:0 fail:0 skip:32
>> fi-snb-2600 total:245 pass:212 dwarn:0 dfail:0 fail:0 skip:33
>>
>> e9e1f8451437763fddfc9e53d008dcacd3ca2ad1 drm-tip: 2016y-11m-29d-
>> 04h-19m-22s UTC integration manifest
>> 0ffa6c6 drm/i915: Move number of scalers initialization to runtime init
>>
>> == Logs ==
>>
>> For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3133/
>
> Jani Saarinen
> Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
>
>
--
Regards,
Nabendu
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: ✗ Fi.CI.BAT: warning for drm/i915: Moving scaler numbers to runtime init (rev5)
2016-11-29 10:10 ` Maiti, Nabendu Bikash
@ 2016-11-29 10:14 ` Saarinen, Jani
0 siblings, 0 replies; 24+ messages in thread
From: Saarinen, Jani @ 2016-11-29 10:14 UTC (permalink / raw)
To: Maiti, Nabendu Bikash, intel-gfx
Hi,
> -----Original Message-----
> From: Maiti, Nabendu Bikash
> Sent: Tuesday, November 29, 2016 12:10 PM
> To: Saarinen, Jani <jani.saarinen@intel.com>; intel-
> gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Moving scaler
> numbers to runtime init (rev5)
>
> Its probably false alarm. Fifo underrun is not related to this patch.
Yes, This was meant to say known issue and not related to this patch series.
>
> On 11/29/2016 2:56 PM, Saarinen, Jani wrote:
> >> == Series Details ==
> >>
> >> Series: drm/i915: Moving scaler numbers to runtime init (rev5)
> >> URL : https://patchwork.freedesktop.org/series/15726/
> >> State : warning
> >>
> >> == Summary ==
> >>
> >> Series 15726v5 drm/i915: Moving scaler numbers to runtime init
> >>
> https://patchwork.freedesktop.org/api/1.0/series/15726/revisions/5/mb
> >> o
> >> x/
> >>
> >> Test kms_pipe_crc_basic:
> >> Subgroup nonblocking-crc-pipe-a:
> >> pass -> DMESG-WARN (fi-ilk-650)
> > Still there:
> > https://bugs.freedesktop.org/show_bug.cgi?id=98251
> > Note this was re-run due to some CI issues not run on all systems.
> >
> >> fi-bdw-5557u total:245 pass:230 dwarn:0 dfail:0 fail:0 skip:15
> >> fi-bsw-n3050 total:245 pass:205 dwarn:0 dfail:0 fail:0 skip:40
> >> fi-bxt-t5700 total:245 pass:217 dwarn:0 dfail:0 fail:0 skip:28
> >> fi-byt-j1900 total:245 pass:217 dwarn:0 dfail:0 fail:0 skip:28
> >> fi-byt-n2820 total:245 pass:213 dwarn:0 dfail:0 fail:0 skip:32
> >> fi-hsw-4770 total:245 pass:225 dwarn:0 dfail:0 fail:0 skip:20
> >> fi-hsw-4770r total:245 pass:225 dwarn:0 dfail:0 fail:0 skip:20
> >> fi-ilk-650 total:245 pass:191 dwarn:1 dfail:0 fail:0 skip:53
> >> fi-ivb-3520m total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
> >> fi-ivb-3770 total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
> >> fi-kbl-7500u total:245 pass:223 dwarn:0 dfail:0 fail:0 skip:22
> >> fi-skl-6260u total:245 pass:231 dwarn:0 dfail:0 fail:0 skip:14
> >> fi-skl-6700hq total:245 pass:224 dwarn:0 dfail:0 fail:0 skip:21
> >> fi-skl-6700k total:245 pass:223 dwarn:1 dfail:0 fail:0 skip:21
> >> fi-snb-2520m total:245 pass:213 dwarn:0 dfail:0 fail:0 skip:32
> >> fi-snb-2600 total:245 pass:212 dwarn:0 dfail:0 fail:0 skip:33
> >>
> >> e9e1f8451437763fddfc9e53d008dcacd3ca2ad1 drm-tip: 2016y-11m-
> 29d-
> >> 04h-19m-22s UTC integration manifest
> >> 0ffa6c6 drm/i915: Move number of scalers initialization to runtime
> >> init
> >>
> >> == Logs ==
> >>
> >> For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3133/
> >
> > Jani Saarinen
> > Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
> >
> >
>
> --
> Regards,
> Nabendu
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3] drm/i915: Move number of scalers initialization to runtime init
2016-11-29 5:53 ` [PATCH v3] " Nabendu Maiti
@ 2016-12-26 11:00 ` Maiti, Nabendu Bikash
2017-01-02 13:00 ` Ander Conselvan De Oliveira
2017-01-02 13:45 ` Ander Conselvan De Oliveira
2 siblings, 0 replies; 24+ messages in thread
From: Maiti, Nabendu Bikash @ 2016-12-26 11:00 UTC (permalink / raw)
To: intel-gfx
Hi,
Please rb this patch.
earlier patch rbed
https://patchwork.freedesktop.org/patch/123962/
On 11/29/2016 11:23 AM, Nabendu Maiti wrote:
> In future patches, we require greater flexibility in describing
> the number of scalers available on each CRTC. To ease that transition
> we move the current assignment to intel_device_info.
>
> Scaler structure initialisation is done if scaler is available on the CRTC.
> Gen9 check is not required as on depending upon numbers of scalers we
> initialize scalers or return without doing anything in skl_init_scalers.
>
> v3: Changed skl_init_scaler to intel_crtc_init_scalers
>
> v2: Added Chris's comments.
>
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
> drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++---------------
> 3 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 1ec9619..bb8c5f0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -758,6 +758,7 @@ struct intel_device_info {
> u16 device_id;
> u8 num_pipes;
> u8 num_sprites[I915_MAX_PIPES];
> + u8 num_scalers[I915_MAX_PIPES];
> u8 gen;
> u16 gen_mask;
> u8 ring_mask; /* Rings supported by the HW */
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 185e3bb..ef26fa8 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> info->num_sprites[PIPE_A] = 2;
> info->num_sprites[PIPE_B] = 2;
> info->num_sprites[PIPE_C] = 1;
> + info->num_scalers[PIPE_A] = 2;
> + info->num_scalers[PIPE_B] = 2;
> + info->num_scalers[PIPE_C] = 1;
> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> for_each_pipe(dev_priv, pipe)
> info->num_sprites[pipe] = 2;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5d11002..46de54a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -115,8 +115,7 @@ static void chv_prepare_pll(struct intel_crtc *crtc,
> const struct intel_crtc_state *pipe_config);
> static void intel_begin_crtc_commit(struct drm_crtc *, struct drm_crtc_state *);
> static void intel_finish_crtc_commit(struct drm_crtc *, struct drm_crtc_state *);
> -static void skl_init_scalers(struct drm_i915_private *dev_priv,
> - struct intel_crtc *crtc,
> +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state);
> static void skylake_pfit_enable(struct intel_crtc *crtc);
> static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
> @@ -10713,7 +10712,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
>
> if (INTEL_GEN(dev_priv) >= 9) {
> - skl_init_scalers(dev_priv, crtc, pipe_config);
> + intel_crtc_init_scalers(crtc, pipe_config);
>
> pipe_config->scaler_state.scaler_id = -1;
> pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
> @@ -15258,14 +15257,18 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
> return ERR_PTR(ret);
> }
>
> -static void skl_init_scalers(struct drm_i915_private *dev_priv,
> - struct intel_crtc *crtc,
> +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc_scaler_state *scaler_state =
> &crtc_state->scaler_state;
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> int i;
>
> + crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
> + if (!crtc->num_scalers)
> + return;
> +
> for (i = 0; i < crtc->num_scalers; i++) {
> struct intel_scaler *scaler = &scaler_state->scalers[i];
>
> @@ -15297,16 +15300,6 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
> intel_crtc->base.state = &crtc_state->base;
> crtc_state->base.crtc = &intel_crtc->base;
>
> - /* initialize shared scalers */
> - if (INTEL_GEN(dev_priv) >= 9) {
> - if (pipe == PIPE_C)
> - intel_crtc->num_scalers = 1;
> - else
> - intel_crtc->num_scalers = SKL_NUM_SCALERS;
> -
> - skl_init_scalers(dev_priv, intel_crtc, crtc_state);
> - }
> -
> primary = intel_primary_plane_create(dev_priv, pipe);
> if (IS_ERR(primary)) {
> ret = PTR_ERR(primary);
> @@ -15348,6 +15341,9 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
>
> intel_crtc->wm.cxsr_allowed = true;
>
> + /* initialize shared scalers */
> + intel_crtc_init_scalers(intel_crtc, crtc_state);
> +
> BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
> dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
> dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
>
--
Regards,
Nabendu
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3] drm/i915: Move number of scalers initialization to runtime init
2016-11-29 5:53 ` [PATCH v3] " Nabendu Maiti
2016-12-26 11:00 ` Maiti, Nabendu Bikash
@ 2017-01-02 13:00 ` Ander Conselvan De Oliveira
2017-01-02 13:04 ` Ander Conselvan De Oliveira
2017-01-02 13:45 ` Ander Conselvan De Oliveira
2 siblings, 1 reply; 24+ messages in thread
From: Ander Conselvan De Oliveira @ 2017-01-02 13:00 UTC (permalink / raw)
To: Nabendu Maiti, intel-gfx
On Tue, 2016-11-29 at 11:23 +0530, Nabendu Maiti wrote:
> In future patches, we require greater flexibility in describing
> the number of scalers available on each CRTC. To ease that transition
> we move the current assignment to intel_device_info.
>
> Scaler structure initialisation is done if scaler is available on the CRTC.
> Gen9 check is not required as on depending upon numbers of scalers we
> initialize scalers or return without doing anything in skl_init_scalers.
>
> v3: Changed skl_init_scaler to intel_crtc_init_scalers
>
> v2: Added Chris's comments.
>
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
> drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++---------------
> 3 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 1ec9619..bb8c5f0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -758,6 +758,7 @@ struct intel_device_info {
> u16 device_id;
> u8 num_pipes;
> u8 num_sprites[I915_MAX_PIPES];
> + u8 num_scalers[I915_MAX_PIPES];
> u8 gen;
> u16 gen_mask;
> u8 ring_mask; /* Rings supported by the HW */
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 185e3bb..ef26fa8 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> info->num_sprites[PIPE_A] = 2;
> info->num_sprites[PIPE_B] = 2;
> info->num_sprites[PIPE_C] = 1;
> + info->num_scalers[PIPE_A] = 2;
> + info->num_scalers[PIPE_B] = 2;
> + info->num_scalers[PIPE_C] = 1;
> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> for_each_pipe(dev_priv, pipe)
> info->num_sprites[pipe] = 2;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5d11002..46de54a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -115,8 +115,7 @@ static void chv_prepare_pll(struct intel_crtc *crtc,
> const struct intel_crtc_state *pipe_config);
> static void intel_begin_crtc_commit(struct drm_crtc *, struct drm_crtc_state *);
> static void intel_finish_crtc_commit(struct drm_crtc *, struct drm_crtc_state *);
> -static void skl_init_scalers(struct drm_i915_private *dev_priv,
> - struct intel_crtc *crtc,
> +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state);
This line is now misaligned.
> static void skylake_pfit_enable(struct intel_crtc *crtc);
> static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
> @@ -10713,7 +10712,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
>
> if (INTEL_GEN(dev_priv) >= 9) {
> - skl_init_scalers(dev_priv, crtc, pipe_config);
> + intel_crtc_init_scalers(crtc, pipe_config);
>
> pipe_config->scaler_state.scaler_id = -1;
> pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
> @@ -15258,14 +15257,18 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
> return ERR_PTR(ret);
> }
>
> -static void skl_init_scalers(struct drm_i915_private *dev_priv,
> - struct intel_crtc *crtc,
> +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state)
Here too.
With that fixed,
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
> {
> struct intel_crtc_scaler_state *scaler_state =
> &crtc_state->scaler_state;
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> int i;
>
> + crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
> + if (!crtc->num_scalers)
> + return;
> +
> for (i = 0; i < crtc->num_scalers; i++) {
> struct intel_scaler *scaler = &scaler_state->scalers[i];
>
> @@ -15297,16 +15300,6 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
> intel_crtc->base.state = &crtc_state->base;
> crtc_state->base.crtc = &intel_crtc->base;
>
> - /* initialize shared scalers */
> - if (INTEL_GEN(dev_priv) >= 9) {
> - if (pipe == PIPE_C)
> - intel_crtc->num_scalers = 1;
> - else
> - intel_crtc->num_scalers = SKL_NUM_SCALERS;
> -
> - skl_init_scalers(dev_priv, intel_crtc, crtc_state);
> - }
> -
> primary = intel_primary_plane_create(dev_priv, pipe);
> if (IS_ERR(primary)) {
> ret = PTR_ERR(primary);
> @@ -15348,6 +15341,9 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
>
> intel_crtc->wm.cxsr_allowed = true;
>
> + /* initialize shared scalers */
> + intel_crtc_init_scalers(intel_crtc, crtc_state);
> +
> BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
> dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
> dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3] drm/i915: Move number of scalers initialization to runtime init
2017-01-02 13:00 ` Ander Conselvan De Oliveira
@ 2017-01-02 13:04 ` Ander Conselvan De Oliveira
2017-01-02 13:21 ` Maiti, Nabendu Bikash
0 siblings, 1 reply; 24+ messages in thread
From: Ander Conselvan De Oliveira @ 2017-01-02 13:04 UTC (permalink / raw)
To: Nabendu Maiti, intel-gfx
On Mon, 2017-01-02 at 15:00 +0200, Ander Conselvan De Oliveira wrote:
> On Tue, 2016-11-29 at 11:23 +0530, Nabendu Maiti wrote:
> >
> > In future patches, we require greater flexibility in describing
> > the number of scalers available on each CRTC. To ease that transition
> > we move the current assignment to intel_device_info.
> >
> > Scaler structure initialisation is done if scaler is available on the CRTC.
> > Gen9 check is not required as on depending upon numbers of scalers we
> > initialize scalers or return without doing anything in skl_init_scalers.
> >
> > v3: Changed skl_init_scaler to intel_crtc_init_scalers
> >
> > v2: Added Chris's comments.
> >
> > Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_drv.h | 1 +
> > drivers/gpu/drm/i915/intel_device_info.c | 3 +++
> > drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++---------------
> > 3 files changed, 15 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h
> > index 1ec9619..bb8c5f0 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -758,6 +758,7 @@ struct intel_device_info {
> > u16 device_id;
> > u8 num_pipes;
> > u8 num_sprites[I915_MAX_PIPES];
> > + u8 num_scalers[I915_MAX_PIPES];
> > u8 gen;
> > u16 gen_mask;
> > u8 ring_mask; /* Rings supported by the HW */
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> > b/drivers/gpu/drm/i915/intel_device_info.c
> > index 185e3bb..ef26fa8 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.c
> > +++ b/drivers/gpu/drm/i915/intel_device_info.c
> > @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct
> > drm_i915_private *dev_priv)
> > info->num_sprites[PIPE_A] = 2;
> > info->num_sprites[PIPE_B] = 2;
> > info->num_sprites[PIPE_C] = 1;
> > + info->num_scalers[PIPE_A] = 2;
> > + info->num_scalers[PIPE_B] = 2;
> > + info->num_scalers[PIPE_C] = 1;
> > } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> > for_each_pipe(dev_priv, pipe)
> > info->num_sprites[pipe] = 2;
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 5d11002..46de54a 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -115,8 +115,7 @@ static void chv_prepare_pll(struct intel_crtc *crtc,
> > const struct intel_crtc_state *pipe_config);
> > static void intel_begin_crtc_commit(struct drm_crtc *, struct
> > drm_crtc_state *);
> > static void intel_finish_crtc_commit(struct drm_crtc *, struct
> > drm_crtc_state *);
> > -static void skl_init_scalers(struct drm_i915_private *dev_priv,
> > - struct intel_crtc *crtc,
> > +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
> > struct intel_crtc_state *crtc_state);
> This line is now misaligned.
>
> >
> > static void skylake_pfit_enable(struct intel_crtc *crtc);
> > static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
> > @@ -10713,7 +10712,7 @@ static bool haswell_get_pipe_config(struct
> > intel_crtc *crtc,
> > I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
> >
> > if (INTEL_GEN(dev_priv) >= 9) {
> > - skl_init_scalers(dev_priv, crtc, pipe_config);
> > + intel_crtc_init_scalers(crtc, pipe_config);
> >
> > pipe_config->scaler_state.scaler_id = -1;
> > pipe_config->scaler_state.scaler_users &= ~(1 <<
> > SKL_CRTC_INDEX);
> > @@ -15258,14 +15257,18 @@ intel_cursor_plane_create(struct drm_i915_private
> > *dev_priv, enum pipe pipe)
> > return ERR_PTR(ret);
> > }
> >
> > -static void skl_init_scalers(struct drm_i915_private *dev_priv,
> > - struct intel_crtc *crtc,
> > +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
> > struct intel_crtc_state *crtc_state)
> Here too.
>
> With that fixed,
>
> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Pushed.
I fixed the coding style issues while pushing, but please observe these in the
future.
Ander
>
> >
> > {
> > struct intel_crtc_scaler_state *scaler_state =
> > &crtc_state->scaler_state;
> > + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > int i;
> >
> > + crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
> > + if (!crtc->num_scalers)
> > + return;
> > +
> > for (i = 0; i < crtc->num_scalers; i++) {
> > struct intel_scaler *scaler = &scaler_state->scalers[i];
> >
> > @@ -15297,16 +15300,6 @@ static int intel_crtc_init(struct drm_i915_private
> > *dev_priv, enum pipe pipe)
> > intel_crtc->base.state = &crtc_state->base;
> > crtc_state->base.crtc = &intel_crtc->base;
> >
> > - /* initialize shared scalers */
> > - if (INTEL_GEN(dev_priv) >= 9) {
> > - if (pipe == PIPE_C)
> > - intel_crtc->num_scalers = 1;
> > - else
> > - intel_crtc->num_scalers = SKL_NUM_SCALERS;
> > -
> > - skl_init_scalers(dev_priv, intel_crtc, crtc_state);
> > - }
> > -
> > primary = intel_primary_plane_create(dev_priv, pipe);
> > if (IS_ERR(primary)) {
> > ret = PTR_ERR(primary);
> > @@ -15348,6 +15341,9 @@ static int intel_crtc_init(struct drm_i915_private
> > *dev_priv, enum pipe pipe)
> >
> > intel_crtc->wm.cxsr_allowed = true;
> >
> > + /* initialize shared scalers */
> > + intel_crtc_init_scalers(intel_crtc, crtc_state);
> > +
> > BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
> > dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
> > dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3] drm/i915: Move number of scalers initialization to runtime init
2017-01-02 13:04 ` Ander Conselvan De Oliveira
@ 2017-01-02 13:21 ` Maiti, Nabendu Bikash
0 siblings, 0 replies; 24+ messages in thread
From: Maiti, Nabendu Bikash @ 2017-01-02 13:21 UTC (permalink / raw)
To: Ander Conselvan De Oliveira, intel-gfx
Sure, Thank you Ander.
On 1/2/2017 6:34 PM, Ander Conselvan De Oliveira wrote:
> On Mon, 2017-01-02 at 15:00 +0200, Ander Conselvan De Oliveira wrote:
>> On Tue, 2016-11-29 at 11:23 +0530, Nabendu Maiti wrote:
>>>
>>> In future patches, we require greater flexibility in describing
>>> the number of scalers available on each CRTC. To ease that transition
>>> we move the current assignment to intel_device_info.
>>>
>>> Scaler structure initialisation is done if scaler is available on the CRTC.
>>> Gen9 check is not required as on depending upon numbers of scalers we
>>> initialize scalers or return without doing anything in skl_init_scalers.
>>>
>>> v3: Changed skl_init_scaler to intel_crtc_init_scalers
>>>
>>> v2: Added Chris's comments.
>>>
>>> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/i915_drv.h | 1 +
>>> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
>>> drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++---------------
>>> 3 files changed, 15 insertions(+), 15 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>>> b/drivers/gpu/drm/i915/i915_drv.h
>>> index 1ec9619..bb8c5f0 100644
>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>> @@ -758,6 +758,7 @@ struct intel_device_info {
>>> u16 device_id;
>>> u8 num_pipes;
>>> u8 num_sprites[I915_MAX_PIPES];
>>> + u8 num_scalers[I915_MAX_PIPES];
>>> u8 gen;
>>> u16 gen_mask;
>>> u8 ring_mask; /* Rings supported by the HW */
>>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c
>>> b/drivers/gpu/drm/i915/intel_device_info.c
>>> index 185e3bb..ef26fa8 100644
>>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>>> @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct
>>> drm_i915_private *dev_priv)
>>> info->num_sprites[PIPE_A] = 2;
>>> info->num_sprites[PIPE_B] = 2;
>>> info->num_sprites[PIPE_C] = 1;
>>> + info->num_scalers[PIPE_A] = 2;
>>> + info->num_scalers[PIPE_B] = 2;
>>> + info->num_scalers[PIPE_C] = 1;
>>> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>>> for_each_pipe(dev_priv, pipe)
>>> info->num_sprites[pipe] = 2;
>>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>>> b/drivers/gpu/drm/i915/intel_display.c
>>> index 5d11002..46de54a 100644
>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>> @@ -115,8 +115,7 @@ static void chv_prepare_pll(struct intel_crtc *crtc,
>>> const struct intel_crtc_state *pipe_config);
>>> static void intel_begin_crtc_commit(struct drm_crtc *, struct
>>> drm_crtc_state *);
>>> static void intel_finish_crtc_commit(struct drm_crtc *, struct
>>> drm_crtc_state *);
>>> -static void skl_init_scalers(struct drm_i915_private *dev_priv,
>>> - struct intel_crtc *crtc,
>>> +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
>>> struct intel_crtc_state *crtc_state);
>> This line is now misaligned.
>>
>>>
>>> static void skylake_pfit_enable(struct intel_crtc *crtc);
>>> static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
>>> @@ -10713,7 +10712,7 @@ static bool haswell_get_pipe_config(struct
>>> intel_crtc *crtc,
>>> I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
>>>
>>> if (INTEL_GEN(dev_priv) >= 9) {
>>> - skl_init_scalers(dev_priv, crtc, pipe_config);
>>> + intel_crtc_init_scalers(crtc, pipe_config);
>>>
>>> pipe_config->scaler_state.scaler_id = -1;
>>> pipe_config->scaler_state.scaler_users &= ~(1 <<
>>> SKL_CRTC_INDEX);
>>> @@ -15258,14 +15257,18 @@ intel_cursor_plane_create(struct drm_i915_private
>>> *dev_priv, enum pipe pipe)
>>> return ERR_PTR(ret);
>>> }
>>>
>>> -static void skl_init_scalers(struct drm_i915_private *dev_priv,
>>> - struct intel_crtc *crtc,
>>> +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
>>> struct intel_crtc_state *crtc_state)
>> Here too.
>>
>> With that fixed,
>>
>> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
>
> Pushed.
>
> I fixed the coding style issues while pushing, but please observe these in the
> future.
>
> Ander
>
>>
>>>
>>> {
>>> struct intel_crtc_scaler_state *scaler_state =
>>> &crtc_state->scaler_state;
>>> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>>> int i;
>>>
>>> + crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
>>> + if (!crtc->num_scalers)
>>> + return;
>>> +
>>> for (i = 0; i < crtc->num_scalers; i++) {
>>> struct intel_scaler *scaler = &scaler_state->scalers[i];
>>>
>>> @@ -15297,16 +15300,6 @@ static int intel_crtc_init(struct drm_i915_private
>>> *dev_priv, enum pipe pipe)
>>> intel_crtc->base.state = &crtc_state->base;
>>> crtc_state->base.crtc = &intel_crtc->base;
>>>
>>> - /* initialize shared scalers */
>>> - if (INTEL_GEN(dev_priv) >= 9) {
>>> - if (pipe == PIPE_C)
>>> - intel_crtc->num_scalers = 1;
>>> - else
>>> - intel_crtc->num_scalers = SKL_NUM_SCALERS;
>>> -
>>> - skl_init_scalers(dev_priv, intel_crtc, crtc_state);
>>> - }
>>> -
>>> primary = intel_primary_plane_create(dev_priv, pipe);
>>> if (IS_ERR(primary)) {
>>> ret = PTR_ERR(primary);
>>> @@ -15348,6 +15341,9 @@ static int intel_crtc_init(struct drm_i915_private
>>> *dev_priv, enum pipe pipe)
>>>
>>> intel_crtc->wm.cxsr_allowed = true;
>>>
>>> + /* initialize shared scalers */
>>> + intel_crtc_init_scalers(intel_crtc, crtc_state);
>>> +
>>> BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
>>> dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
>>> dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
--
Regards,
Nabendu
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3] drm/i915: Move number of scalers initialization to runtime init
2016-11-29 5:53 ` [PATCH v3] " Nabendu Maiti
2016-12-26 11:00 ` Maiti, Nabendu Bikash
2017-01-02 13:00 ` Ander Conselvan De Oliveira
@ 2017-01-02 13:45 ` Ander Conselvan De Oliveira
2 siblings, 0 replies; 24+ messages in thread
From: Ander Conselvan De Oliveira @ 2017-01-02 13:45 UTC (permalink / raw)
To: Nabendu Maiti, intel-gfx
On Tue, 2016-11-29 at 11:23 +0530, Nabendu Maiti wrote:
> In future patches, we require greater flexibility in describing
> the number of scalers available on each CRTC. To ease that transition
> we move the current assignment to intel_device_info.
>
> Scaler structure initialisation is done if scaler is available on the CRTC.
> Gen9 check is not required as on depending upon numbers of scalers we
> initialize scalers or return without doing anything in skl_init_scalers.
>
> v3: Changed skl_init_scaler to intel_crtc_init_scalers
>
> v2: Added Chris's comments.
>
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.c | 3 +++
> drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++---------------
> 3 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 1ec9619..bb8c5f0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -758,6 +758,7 @@ struct intel_device_info {
> u16 device_id;
> u8 num_pipes;
> u8 num_sprites[I915_MAX_PIPES];
> + u8 num_scalers[I915_MAX_PIPES];
> u8 gen;
> u16 gen_mask;
> u8 ring_mask; /* Rings supported by the HW */
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> b/drivers/gpu/drm/i915/intel_device_info.c
> index 185e3bb..ef26fa8 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -282,6 +282,9 @@ void intel_device_info_runtime_init(struct
> drm_i915_private *dev_priv)
> info->num_sprites[PIPE_A] = 2;
> info->num_sprites[PIPE_B] = 2;
> info->num_sprites[PIPE_C] = 1;
> + info->num_scalers[PIPE_A] = 2;
> + info->num_scalers[PIPE_B] = 2;
> + info->num_scalers[PIPE_C] = 1;
*double facepalm*
I missed this only initializes num_scalers for bxt, thus breaking skl and glk.
Ander
> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> for_each_pipe(dev_priv, pipe)
> info->num_sprites[pipe] = 2;
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 5d11002..46de54a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -115,8 +115,7 @@ static void chv_prepare_pll(struct intel_crtc *crtc,
> const struct intel_crtc_state *pipe_config);
> static void intel_begin_crtc_commit(struct drm_crtc *, struct drm_crtc_state
> *);
> static void intel_finish_crtc_commit(struct drm_crtc *, struct drm_crtc_state
> *);
> -static void skl_init_scalers(struct drm_i915_private *dev_priv,
> - struct intel_crtc *crtc,
> +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state);
> static void skylake_pfit_enable(struct intel_crtc *crtc);
> static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
> @@ -10713,7 +10712,7 @@ static bool haswell_get_pipe_config(struct intel_crtc
> *crtc,
> I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
>
> if (INTEL_GEN(dev_priv) >= 9) {
> - skl_init_scalers(dev_priv, crtc, pipe_config);
> + intel_crtc_init_scalers(crtc, pipe_config);
>
> pipe_config->scaler_state.scaler_id = -1;
> pipe_config->scaler_state.scaler_users &= ~(1 <<
> SKL_CRTC_INDEX);
> @@ -15258,14 +15257,18 @@ intel_cursor_plane_create(struct drm_i915_private
> *dev_priv, enum pipe pipe)
> return ERR_PTR(ret);
> }
>
> -static void skl_init_scalers(struct drm_i915_private *dev_priv,
> - struct intel_crtc *crtc,
> +static void intel_crtc_init_scalers(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc_scaler_state *scaler_state =
> &crtc_state->scaler_state;
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> int i;
>
> + crtc->num_scalers = dev_priv->info.num_scalers[crtc->pipe];
> + if (!crtc->num_scalers)
> + return;
> +
> for (i = 0; i < crtc->num_scalers; i++) {
> struct intel_scaler *scaler = &scaler_state->scalers[i];
>
> @@ -15297,16 +15300,6 @@ static int intel_crtc_init(struct drm_i915_private
> *dev_priv, enum pipe pipe)
> intel_crtc->base.state = &crtc_state->base;
> crtc_state->base.crtc = &intel_crtc->base;
>
> - /* initialize shared scalers */
> - if (INTEL_GEN(dev_priv) >= 9) {
> - if (pipe == PIPE_C)
> - intel_crtc->num_scalers = 1;
> - else
> - intel_crtc->num_scalers = SKL_NUM_SCALERS;
> -
> - skl_init_scalers(dev_priv, intel_crtc, crtc_state);
> - }
> -
> primary = intel_primary_plane_create(dev_priv, pipe);
> if (IS_ERR(primary)) {
> ret = PTR_ERR(primary);
> @@ -15348,6 +15341,9 @@ static int intel_crtc_init(struct drm_i915_private
> *dev_priv, enum pipe pipe)
>
> intel_crtc->wm.cxsr_allowed = true;
>
> + /* initialize shared scalers */
> + intel_crtc_init_scalers(intel_crtc, crtc_state);
> +
> BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
> dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
> dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
_______________________________________________
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^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2017-01-02 13:45 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-11-22 10:56 [PATCH] drm/i915: Moving scaler numbers to runtime init Nabendu Maiti
2016-11-22 10:52 ` Chris Wilson
2016-11-22 11:15 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-11-22 12:01 ` [PATCH] drm/i915: Moving no of scalers initialization " Nabendu Maiti
2016-11-22 15:35 ` Chris Wilson
2016-11-23 12:42 ` Maiti, Nabendu Bikash
2016-11-23 13:57 ` [PATCH] drm/i915: Move number " Nabendu Maiti
2016-11-25 9:46 ` Nabendu Maiti
2016-11-25 9:44 ` Chris Wilson
2016-11-25 10:32 ` Maiti, Nabendu Bikash
2016-11-29 5:53 ` [PATCH v3] " Nabendu Maiti
2016-12-26 11:00 ` Maiti, Nabendu Bikash
2017-01-02 13:00 ` Ander Conselvan De Oliveira
2017-01-02 13:04 ` Ander Conselvan De Oliveira
2017-01-02 13:21 ` Maiti, Nabendu Bikash
2017-01-02 13:45 ` Ander Conselvan De Oliveira
2016-11-22 12:15 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev2) Patchwork
2016-11-23 14:16 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev3) Patchwork
2016-11-25 10:45 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev4) Patchwork
2016-11-29 6:15 ` ✓ Fi.CI.BAT: success for drm/i915: Moving scaler numbers to runtime init (rev5) Patchwork
2016-11-29 9:14 ` ✗ Fi.CI.BAT: warning " Patchwork
2016-11-29 9:26 ` Saarinen, Jani
2016-11-29 10:10 ` Maiti, Nabendu Bikash
2016-11-29 10:14 ` Saarinen, Jani
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