From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757755AbcK3LBq convert rfc822-to-8bit (ORCPT ); Wed, 30 Nov 2016 06:01:46 -0500 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:50695 "EHLO metis.ext.4.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755088AbcK3LBi (ORCPT ); Wed, 30 Nov 2016 06:01:38 -0500 Message-ID: <1480503686.9183.69.camel@pengutronix.de> Subject: Re: [PATCH 4/6] net: ethernet: ti: cpts: add ptp pps support From: Jan =?ISO-8859-1?Q?L=FCbbe?= To: Grygorii Strashko Cc: "David S. Miller" , netdev@vger.kernel.org, Mugunthan V N , Richard Cochran , Sekhar Nori , linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org, Murali Karicheri , Wingman Kwok Date: Wed, 30 Nov 2016 12:01:26 +0100 In-Reply-To: <20161128230428.6872-5-grygorii.strashko@ti.com> References: <20161128230428.6872-1-grygorii.strashko@ti.com> <20161128230428.6872-5-grygorii.strashko@ti.com> Organization: Pengutronix Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c3 X-SA-Exim-Mail-From: jlu@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mo, 2016-11-28 at 17:04 -0600, Grygorii Strashko wrote: > --- a/Documentation/devicetree/bindings/net/keystone-netcp.txt > +++ b/Documentation/devicetree/bindings/net/keystone-netcp.txt > @@ -127,6 +127,16 @@ Optional properties: > The number of external time stamp channels. > The different CPTS versions might support up 8 > external time stamp channels. if absent - unsupported. > + - cpts-ts-comp-length: > + Enable time stamp comparison event and TS_COMP signal output > + generation when CPTS counter reaches a value written to > + the TS_COMP_VAL register. > + The generated pulse width is 3 refclk cycles if this property > + has no value (empty) or, otherwise, it should specify desired > + pulse width in number of refclk periods - max value 2^16. > + TS_COMP functionality will be disabled if not present. > + - cpts-ts-comp-polarity-low: > + Set polarity of TS_COMP signal to low. Default is hight. Why is this configured via DT? Are the values fixed for a given board, depending on external components? Couldn't this be configured somewhere else? Regards, Jan -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |