From: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, david@gibson.dropbear.id.au,
nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH v4 0/6] POWER9 TCG enablements - BCD functions - final part
Date: Mon, 19 Dec 2016 14:47:38 -0200 [thread overview]
Message-ID: <1482166064-18121-1-git-send-email-joserz@linux.vnet.ibm.com> (raw)
v4:
- improves functions to behave exactly like the target
v3:
- moves shift functions to host-utils.c and added config_int128 guard
- changes Makefile to always compile host-utils.c
- redesigns bcd[u]trunc to use bitwise operations
- removes "target-ppc: Implement bcd_is_valid function" (merged)
v2:
- bcd[s,sr,us] uses 1 byte for shifting instead of 4 bytes
- left/right functions in host-utils are out of CONFIG_INT128
- fixes overflowing issue in left shift and added a testcase
This serie contains 5 new instructions for POWER9 ISA3.0, left/right shifts for
unsigned quadwords and a small improvement to check whether a bcd value is
valid or not.
bcds.: Decimal signed shift
bcdus.: Decimal unsigned shift
bcdsr.: Decimal shift and round
bcdtrunc.: Decimal signed trucate
bcdutrunc.: Decimal unsigned truncate
Jose Ricardo Ziviani (6):
target-ppc: Implement unsigned quadword left/right shift and unit
tests
target-ppc: Implement bcds. instruction
target-ppc: Implement bcdus. instruction
target-ppc: Implement bcdsr. instruction
target-ppc: Implement bcdtrunc. instruction
target-ppc: Implement bcdutrunc. instruction
include/qemu/host-utils.h | 3 +
target-ppc/helper.h | 5 +
target-ppc/int_helper.c | 217 ++++++++++++++++++++++++++++++++++++
target-ppc/translate/vmx-impl.inc.c | 16 +++
target-ppc/translate/vmx-ops.inc.c | 13 ++-
tests/Makefile.include | 5 +-
tests/test-shift128.c | 98 ++++++++++++++++
util/Makefile.objs | 2 +-
util/host-utils.c | 44 ++++++++
9 files changed, 396 insertions(+), 7 deletions(-)
create mode 100644 tests/test-shift128.c
--
2.7.4
next reply other threads:[~2016-12-19 16:48 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-19 16:47 Jose Ricardo Ziviani [this message]
2016-12-19 16:47 ` [Qemu-devel] [PATCH v4 1/6] target-ppc: Implement unsigned quadword left/right shift and unit tests Jose Ricardo Ziviani
2017-01-02 23:53 ` David Gibson
2017-01-03 13:37 ` [Qemu-devel] [Qemu-ppc] " joserz
2017-01-03 15:20 ` [Qemu-devel] " Eric Blake
2017-01-05 21:45 ` [Qemu-devel] [Qemu-ppc] " joserz
2017-01-05 21:59 ` Eric Blake
2016-12-19 16:47 ` [Qemu-devel] [PATCH v4 2/6] target-ppc: Implement bcds. instruction Jose Ricardo Ziviani
2017-01-03 0:08 ` David Gibson
2016-12-19 16:47 ` [Qemu-devel] [PATCH v4 3/6] target-ppc: Implement bcdus. instruction Jose Ricardo Ziviani
2016-12-19 16:47 ` [Qemu-devel] [PATCH v4 4/6] target-ppc: Implement bcdsr. instruction Jose Ricardo Ziviani
2016-12-19 16:47 ` [Qemu-devel] [PATCH v4 5/6] target-ppc: Implement bcdtrunc. instruction Jose Ricardo Ziviani
2016-12-19 16:47 ` [Qemu-devel] [PATCH v4 6/6] target-ppc: Implement bcdutrunc. instruction Jose Ricardo Ziviani
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