From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3tyK8v0Jc4zDqN4 for ; Tue, 10 Jan 2017 15:41:02 +1100 (AEDT) Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id v0A4dAxa112308 for ; Mon, 9 Jan 2017 23:41:00 -0500 Received: from e23smtp07.au.ibm.com (e23smtp07.au.ibm.com [202.81.31.140]) by mx0b-001b2d01.pphosted.com with ESMTP id 27vmy4xyn1-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 09 Jan 2017 23:41:00 -0500 Received: from localhost by e23smtp07.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 10 Jan 2017 14:40:57 +1000 Received: from d23dlp02.au.ibm.com (202.81.31.213) by e23smtp07.au.ibm.com (202.81.31.204) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Tue, 10 Jan 2017 14:40:54 +1000 Received: from d23relay10.au.ibm.com (d23relay10.au.ibm.com [9.190.26.77]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id 11E842BB0045 for ; Tue, 10 Jan 2017 15:40:54 +1100 (EST) Received: from d23av05.au.ibm.com (d23av05.au.ibm.com [9.190.234.119]) by d23relay10.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v0A4ertR1442136 for ; Tue, 10 Jan 2017 15:40:53 +1100 Received: from d23av05.au.ibm.com (localhost [127.0.0.1]) by d23av05.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v0A4erZ4002687 for ; Tue, 10 Jan 2017 15:40:53 +1100 Received: from ozlabs.au.ibm.com (ozlabs.au.ibm.com [9.192.253.14]) by d23av05.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v0A4eroE002680; Tue, 10 Jan 2017 15:40:53 +1100 Received: from pasglop (unknown [9.192.163.4]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id 0A534A0120; Tue, 10 Jan 2017 15:40:50 +1100 (AEDT) Subject: Re: [PATCH v2 4/5] drivers/mailbox: Add aspeed ast2400/ast2500 mbox driver From: Benjamin Herrenschmidt Reply-To: benh@au1.ibm.com To: Cyril Bur , Andrew Jeffery , openbmc@lists.ozlabs.org Cc: millerjo@linux.vnet.ibm.com Date: Mon, 09 Jan 2017 22:40:51 -0600 In-Reply-To: <1484022993.6236.12.camel@gmail.com> References: <20161222060610.29695-1-cyrilbur@gmail.com> <20161222060610.29695-5-cyrilbur@gmail.com> <1482460941.3419.26.camel@aj.id.au> <1482479795.14044.5.camel@gmail.com> <1483406661.7801.1.camel@aj.id.au> <1483911906.15843.61.camel@au1.ibm.com> <1483999740.6236.2.camel@gmail.com> <1484002504.12800.1.camel@aj.id.au> <1484022504.21117.7.camel@au1.ibm.com> <1484022993.6236.12.camel@gmail.com> Organization: IBM Australia Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.3 (3.22.3-1.fc25) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 17011004-0044-0000-0000-0000021AE7F2 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17011004-0045-0000-0000-00000653734E Message-Id: <1484023251.21117.9.camel@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-01-10_03:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1612050000 definitions=main-1701100063 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Jan 2017 04:41:03 -0000 On Tue, 2017-01-10 at 15:36 +1100, Cyril Bur wrote: > So, its basically no more work (I think...) to just have partial > writes, which... satisfy this requirement no? > > Just so we're on the same page - theres nothing 'special' about the > write it's just that he other end has mapped that 'data' register to > trigger an interrupt... the kernel doesn't know that nor does it need > to, the write is like any other, the interrupt gets triggered by > hardware. Ok, that's fine then