From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chee Tien Fong Date: Tue, 10 Jan 2017 13:20:26 +0800 Subject: [U-Boot] [PATCH v4 13/28] arm: socfpga: arria10 fpga does not have bridges mapped In-Reply-To: <1484025641-5412-1-git-send-email-tien.fong.chee@intel.com> References: <1484025641-5412-1-git-send-email-tien.fong.chee@intel.com> Message-ID: <1484025641-5412-14-git-send-email-tien.fong.chee@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Tien Fong Chee On the Arria10 device, the bridges are not mapped through the interconnect. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong --- drivers/fpga/socfpga.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index f1b2f2c..bfefafd 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/socfpga.c @@ -278,8 +278,10 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) /* Disable all axi bridge (hps2fpga, lwhps2fpga & fpga2hps) */ socfpga_bridges_reset(1); +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) /* Unmap the bridges from NIC-301 */ writel(0x1, SOCFPGA_L3REGS_ADDRESS); +#endif /* Initialize the FPGA Manager */ status = fpgamgr_program_init(); -- 2.2.0