From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752705AbdASN2E (ORCPT ); Thu, 19 Jan 2017 08:28:04 -0500 Received: from mail-wj0-f193.google.com ([209.85.210.193]:32845 "EHLO mail-wj0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752402AbdASN1c (ORCPT ); Thu, 19 Jan 2017 08:27:32 -0500 From: "M'boumba Cedric Madianga" To: wsa@the-dreams.de, robh+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, linus.walleij@linaro.org, patrice.chotard@st.com, linux@armlinux.org.uk, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, u.kleine-koenig@pengutronix.de Cc: "M'boumba Cedric Madianga" Subject: [PATCH v10 3/5] ARM: dts: stm32: Add I2C1 support for STM32F429 SoC Date: Thu, 19 Jan 2017 14:25:14 +0100 Message-Id: <1484832316-5594-4-git-send-email-cedric.madianga@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1484832316-5594-1-git-send-email-cedric.madianga@gmail.com> References: <1484832316-5594-1-git-send-email-cedric.madianga@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds I2C1 support for STM32F429 SoC Signed-off-by: Patrice Chotard Signed-off-by: M'boumba Cedric Madianga --- arch/arm/boot/dts/stm32f429.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index e4dae0e..5b063e9 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -48,6 +48,7 @@ #include "skeleton.dtsi" #include "armv7-m.dtsi" #include +#include / { clocks { @@ -153,6 +154,18 @@ status = "disabled"; }; + i2c1: i2c@40005400 { + compatible = "st,stm32f4-i2c"; + reg = <0x40005400 0x400>; + interrupts = <31>, + <32>; + resets = <&rcc STM32F4_APB1_RESET(I2C1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C1)>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + usart7: serial@40007800 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40007800 0x400>; @@ -355,6 +368,16 @@ slew-rate = <2>; }; }; + + i2c1_pins_b: i2c1@0 { + pins { + pinmux = , + ; + bias-disable; + drive-open-drain; + slew-rate = <3>; + }; + }; }; rcc: rcc@40023810 { -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: cedric.madianga@gmail.com (M'boumba Cedric Madianga) Date: Thu, 19 Jan 2017 14:25:14 +0100 Subject: [PATCH v10 3/5] ARM: dts: stm32: Add I2C1 support for STM32F429 SoC In-Reply-To: <1484832316-5594-1-git-send-email-cedric.madianga@gmail.com> References: <1484832316-5594-1-git-send-email-cedric.madianga@gmail.com> Message-ID: <1484832316-5594-4-git-send-email-cedric.madianga@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This patch adds I2C1 support for STM32F429 SoC Signed-off-by: Patrice Chotard Signed-off-by: M'boumba Cedric Madianga --- arch/arm/boot/dts/stm32f429.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index e4dae0e..5b063e9 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -48,6 +48,7 @@ #include "skeleton.dtsi" #include "armv7-m.dtsi" #include +#include / { clocks { @@ -153,6 +154,18 @@ status = "disabled"; }; + i2c1: i2c at 40005400 { + compatible = "st,stm32f4-i2c"; + reg = <0x40005400 0x400>; + interrupts = <31>, + <32>; + resets = <&rcc STM32F4_APB1_RESET(I2C1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C1)>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + usart7: serial at 40007800 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40007800 0x400>; @@ -355,6 +368,16 @@ slew-rate = <2>; }; }; + + i2c1_pins_b: i2c1 at 0 { + pins { + pinmux = , + ; + bias-disable; + drive-open-drain; + slew-rate = <3>; + }; + }; }; rcc: rcc at 40023810 { -- 1.9.1