From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750972AbdAXCix (ORCPT ); Mon, 23 Jan 2017 21:38:53 -0500 Received: from mail-pf0-f196.google.com ([209.85.192.196]:34979 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750927AbdAXCiv (ORCPT ); Mon, 23 Jan 2017 21:38:51 -0500 From: Chris Zhong To: john@metanate.com, dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, mark.rutland@arm.com, devicetree@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, pawel.moll@arm.com, seanpaul@chromium.org Cc: linux-rockchip@lists.infradead.org, Chris Zhong , Mark Yao , David Airlie , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 6/6] drm/rockchip/dsi: add dw-mipi power domain support Date: Tue, 24 Jan 2017 10:38:06 +0800 Message-Id: <1485225486-669-7-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1485225486-669-1-git-send-email-zyw@rock-chips.com> References: <1485225486-669-1-git-send-email-zyw@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reference the power domain incase dw-mipi power down when in use. Signed-off-by: Chris Zhong Reviewed-by: Sean Paul --- Changes in v4: None Changes in v3: None drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 6f0e252..1462101e 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -293,6 +294,7 @@ struct dw_mipi_dsi { struct clk *pclk; struct clk *phy_cfg_clk; + int dpms_mode; unsigned int lane_mbps; /* per lane */ u32 channel; u32 lanes; @@ -969,6 +971,9 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) { struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder); + if (dsi->dpms_mode != DRM_MODE_DPMS_ON) + return; + if (clk_prepare_enable(dsi->pclk)) { dev_err(dsi->dev, "%s: Failed to enable pclk\n", __func__); return; @@ -980,7 +985,9 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) drm_panel_unprepare(dsi->panel); dw_mipi_dsi_disable(dsi); + pm_runtime_put(dsi->dev); clk_disable_unprepare(dsi->pclk); + dsi->dpms_mode = DRM_MODE_DPMS_OFF; } static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) @@ -990,11 +997,15 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder); u32 val; + if (dsi->dpms_mode == DRM_MODE_DPMS_ON) + return; + if (clk_prepare_enable(dsi->pclk)) { dev_err(dsi->dev, "%s: Failed to enable pclk\n", __func__); return; } + pm_runtime_get_sync(dsi->dev); dw_mipi_dsi_init(dsi); dw_mipi_dsi_dpi_config(dsi); dw_mipi_dsi_packet_handler_config(dsi); @@ -1030,6 +1041,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) regmap_write(dsi->grf_regmap, pdata->grf_switch_reg, val); dev_dbg(dsi->dev, "vop %s output to dsi0\n", (mux) ? "LIT" : "BIG"); + dsi->dpms_mode = DRM_MODE_DPMS_ON; } static int @@ -1198,6 +1210,7 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master, dsi->dev = dev; dsi->pdata = pdata; + dsi->dpms_mode = DRM_MODE_DPMS_OFF; ret = rockchip_mipi_parse_dt(dsi); if (ret) @@ -1271,6 +1284,8 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master, dev_set_drvdata(dev, dsi); + pm_runtime_enable(dev); + dsi->dsi_host.ops = &dw_mipi_dsi_host_ops; dsi->dsi_host.dev = dev; ret = mipi_dsi_host_register(&dsi->dsi_host); @@ -1293,6 +1308,7 @@ static void dw_mipi_dsi_unbind(struct device *dev, struct device *master, struct dw_mipi_dsi *dsi = dev_get_drvdata(dev); mipi_dsi_host_unregister(&dsi->dsi_host); + pm_runtime_disable(dev); clk_disable_unprepare(dsi->pllref_clk); } -- 2.6.3 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Zhong Subject: [PATCH v4 6/6] drm/rockchip/dsi: add dw-mipi power domain support Date: Tue, 24 Jan 2017 10:38:06 +0800 Message-ID: <1485225486-669-7-git-send-email-zyw@rock-chips.com> References: <1485225486-669-1-git-send-email-zyw@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1485225486-669-1-git-send-email-zyw@rock-chips.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: john@metanate.com, dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, mark.rutland@arm.com, devicetree@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, pawel.moll@arm.com, seanpaul@chromium.org Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Chris Zhong , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org UmVmZXJlbmNlIHRoZSBwb3dlciBkb21haW4gaW5jYXNlIGR3LW1pcGkgcG93ZXIgZG93biB3aGVu CmluIHVzZS4KClNpZ25lZC1vZmYtYnk6IENocmlzIFpob25nIDx6eXdAcm9jay1jaGlwcy5jb20+ ClJldmlld2VkLWJ5OiBTZWFuIFBhdWwgPHNlYW5wYXVsQGNocm9taXVtLm9yZz4KLS0tCgpDaGFu Z2VzIGluIHY0OiBOb25lCkNoYW5nZXMgaW4gdjM6IE5vbmUKCiBkcml2ZXJzL2dwdS9kcm0vcm9j a2NoaXAvZHctbWlwaS1kc2kuYyB8IDE2ICsrKysrKysrKysrKysrKysKIDEgZmlsZSBjaGFuZ2Vk LCAxNiBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlw L2R3LW1pcGktZHNpLmMgYi9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvZHctbWlwaS1kc2kuYwpp bmRleCA2ZjBlMjUyLi4xNDYyMTAxZSAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL3JvY2tj aGlwL2R3LW1pcGktZHNpLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL2R3LW1pcGkt ZHNpLmMKQEAgLTEyLDYgKzEyLDcgQEAKICNpbmNsdWRlIDxsaW51eC9tYXRoNjQuaD4KICNpbmNs dWRlIDxsaW51eC9tb2R1bGUuaD4KICNpbmNsdWRlIDxsaW51eC9vZl9kZXZpY2UuaD4KKyNpbmNs dWRlIDxsaW51eC9wbV9ydW50aW1lLmg+CiAjaW5jbHVkZSA8bGludXgvcmVnbWFwLmg+CiAjaW5j bHVkZSA8bGludXgvcmVzZXQuaD4KICNpbmNsdWRlIDxsaW51eC9tZmQvc3lzY29uLmg+CkBAIC0y OTMsNiArMjk0LDcgQEAgc3RydWN0IGR3X21pcGlfZHNpIHsKIAlzdHJ1Y3QgY2xrICpwY2xrOwog CXN0cnVjdCBjbGsgKnBoeV9jZmdfY2xrOwogCisJaW50IGRwbXNfbW9kZTsKIAl1bnNpZ25lZCBp bnQgbGFuZV9tYnBzOyAvKiBwZXIgbGFuZSAqLwogCXUzMiBjaGFubmVsOwogCXUzMiBsYW5lczsK QEAgLTk2OSw2ICs5NzEsOSBAQCBzdGF0aWMgdm9pZCBkd19taXBpX2RzaV9lbmNvZGVyX2Rpc2Fi bGUoc3RydWN0IGRybV9lbmNvZGVyICplbmNvZGVyKQogewogCXN0cnVjdCBkd19taXBpX2RzaSAq ZHNpID0gZW5jb2Rlcl90b19kc2koZW5jb2Rlcik7CiAKKwlpZiAoZHNpLT5kcG1zX21vZGUgIT0g RFJNX01PREVfRFBNU19PTikKKwkJcmV0dXJuOworCiAJaWYgKGNsa19wcmVwYXJlX2VuYWJsZShk c2ktPnBjbGspKSB7CiAJCWRldl9lcnIoZHNpLT5kZXYsICIlczogRmFpbGVkIHRvIGVuYWJsZSBw Y2xrXG4iLCBfX2Z1bmNfXyk7CiAJCXJldHVybjsKQEAgLTk4MCw3ICs5ODUsOSBAQCBzdGF0aWMg dm9pZCBkd19taXBpX2RzaV9lbmNvZGVyX2Rpc2FibGUoc3RydWN0IGRybV9lbmNvZGVyICplbmNv ZGVyKQogCWRybV9wYW5lbF91bnByZXBhcmUoZHNpLT5wYW5lbCk7CiAKIAlkd19taXBpX2RzaV9k aXNhYmxlKGRzaSk7CisJcG1fcnVudGltZV9wdXQoZHNpLT5kZXYpOwogCWNsa19kaXNhYmxlX3Vu cHJlcGFyZShkc2ktPnBjbGspOworCWRzaS0+ZHBtc19tb2RlID0gRFJNX01PREVfRFBNU19PRkY7 CiB9CiAKIHN0YXRpYyB2b2lkIGR3X21pcGlfZHNpX2VuY29kZXJfZW5hYmxlKHN0cnVjdCBkcm1f ZW5jb2RlciAqZW5jb2RlcikKQEAgLTk5MCwxMSArOTk3LDE1IEBAIHN0YXRpYyB2b2lkIGR3X21p cGlfZHNpX2VuY29kZXJfZW5hYmxlKHN0cnVjdCBkcm1fZW5jb2RlciAqZW5jb2RlcikKIAlpbnQg bXV4ID0gZHJtX29mX2VuY29kZXJfYWN0aXZlX2VuZHBvaW50X2lkKGRzaS0+ZGV2LT5vZl9ub2Rl LCBlbmNvZGVyKTsKIAl1MzIgdmFsOwogCisJaWYgKGRzaS0+ZHBtc19tb2RlID09IERSTV9NT0RF X0RQTVNfT04pCisJCXJldHVybjsKKwogCWlmIChjbGtfcHJlcGFyZV9lbmFibGUoZHNpLT5wY2xr KSkgewogCQlkZXZfZXJyKGRzaS0+ZGV2LCAiJXM6IEZhaWxlZCB0byBlbmFibGUgcGNsa1xuIiwg X19mdW5jX18pOwogCQlyZXR1cm47CiAJfQogCisJcG1fcnVudGltZV9nZXRfc3luYyhkc2ktPmRl dik7CiAJZHdfbWlwaV9kc2lfaW5pdChkc2kpOwogCWR3X21pcGlfZHNpX2RwaV9jb25maWcoZHNp KTsKIAlkd19taXBpX2RzaV9wYWNrZXRfaGFuZGxlcl9jb25maWcoZHNpKTsKQEAgLTEwMzAsNiAr MTA0MSw3IEBAIHN0YXRpYyB2b2lkIGR3X21pcGlfZHNpX2VuY29kZXJfZW5hYmxlKHN0cnVjdCBk cm1fZW5jb2RlciAqZW5jb2RlcikKIAogCXJlZ21hcF93cml0ZShkc2ktPmdyZl9yZWdtYXAsIHBk YXRhLT5ncmZfc3dpdGNoX3JlZywgdmFsKTsKIAlkZXZfZGJnKGRzaS0+ZGV2LCAidm9wICVzIG91 dHB1dCB0byBkc2kwXG4iLCAobXV4KSA/ICJMSVQiIDogIkJJRyIpOworCWRzaS0+ZHBtc19tb2Rl ID0gRFJNX01PREVfRFBNU19PTjsKIH0KIAogc3RhdGljIGludApAQCAtMTE5OCw2ICsxMjEwLDcg QEAgc3RhdGljIGludCBkd19taXBpX2RzaV9iaW5kKHN0cnVjdCBkZXZpY2UgKmRldiwgc3RydWN0 IGRldmljZSAqbWFzdGVyLAogCiAJZHNpLT5kZXYgPSBkZXY7CiAJZHNpLT5wZGF0YSA9IHBkYXRh OworCWRzaS0+ZHBtc19tb2RlID0gRFJNX01PREVfRFBNU19PRkY7CiAKIAlyZXQgPSByb2NrY2hp cF9taXBpX3BhcnNlX2R0KGRzaSk7CiAJaWYgKHJldCkKQEAgLTEyNzEsNiArMTI4NCw4IEBAIHN0 YXRpYyBpbnQgZHdfbWlwaV9kc2lfYmluZChzdHJ1Y3QgZGV2aWNlICpkZXYsIHN0cnVjdCBkZXZp Y2UgKm1hc3RlciwKIAogCWRldl9zZXRfZHJ2ZGF0YShkZXYsIGRzaSk7CiAKKwlwbV9ydW50aW1l X2VuYWJsZShkZXYpOworCiAJZHNpLT5kc2lfaG9zdC5vcHMgPSAmZHdfbWlwaV9kc2lfaG9zdF9v cHM7CiAJZHNpLT5kc2lfaG9zdC5kZXYgPSBkZXY7CiAJcmV0ID0gbWlwaV9kc2lfaG9zdF9yZWdp c3RlcigmZHNpLT5kc2lfaG9zdCk7CkBAIC0xMjkzLDYgKzEzMDgsNyBAQCBzdGF0aWMgdm9pZCBk d19taXBpX2RzaV91bmJpbmQoc3RydWN0IGRldmljZSAqZGV2LCBzdHJ1Y3QgZGV2aWNlICptYXN0 ZXIsCiAJc3RydWN0IGR3X21pcGlfZHNpICpkc2kgPSBkZXZfZ2V0X2RydmRhdGEoZGV2KTsKIAog CW1pcGlfZHNpX2hvc3RfdW5yZWdpc3RlcigmZHNpLT5kc2lfaG9zdCk7CisJcG1fcnVudGltZV9k aXNhYmxlKGRldik7CiAJY2xrX2Rpc2FibGVfdW5wcmVwYXJlKGRzaS0+cGxscmVmX2Nsayk7CiB9 CiAKLS0gCjIuNi4zCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5v cmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2 ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: zyw@rock-chips.com (Chris Zhong) Date: Tue, 24 Jan 2017 10:38:06 +0800 Subject: [PATCH v4 6/6] drm/rockchip/dsi: add dw-mipi power domain support In-Reply-To: <1485225486-669-1-git-send-email-zyw@rock-chips.com> References: <1485225486-669-1-git-send-email-zyw@rock-chips.com> Message-ID: <1485225486-669-7-git-send-email-zyw@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Reference the power domain incase dw-mipi power down when in use. Signed-off-by: Chris Zhong Reviewed-by: Sean Paul --- Changes in v4: None Changes in v3: None drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 6f0e252..1462101e 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -293,6 +294,7 @@ struct dw_mipi_dsi { struct clk *pclk; struct clk *phy_cfg_clk; + int dpms_mode; unsigned int lane_mbps; /* per lane */ u32 channel; u32 lanes; @@ -969,6 +971,9 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) { struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder); + if (dsi->dpms_mode != DRM_MODE_DPMS_ON) + return; + if (clk_prepare_enable(dsi->pclk)) { dev_err(dsi->dev, "%s: Failed to enable pclk\n", __func__); return; @@ -980,7 +985,9 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) drm_panel_unprepare(dsi->panel); dw_mipi_dsi_disable(dsi); + pm_runtime_put(dsi->dev); clk_disable_unprepare(dsi->pclk); + dsi->dpms_mode = DRM_MODE_DPMS_OFF; } static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) @@ -990,11 +997,15 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder); u32 val; + if (dsi->dpms_mode == DRM_MODE_DPMS_ON) + return; + if (clk_prepare_enable(dsi->pclk)) { dev_err(dsi->dev, "%s: Failed to enable pclk\n", __func__); return; } + pm_runtime_get_sync(dsi->dev); dw_mipi_dsi_init(dsi); dw_mipi_dsi_dpi_config(dsi); dw_mipi_dsi_packet_handler_config(dsi); @@ -1030,6 +1041,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) regmap_write(dsi->grf_regmap, pdata->grf_switch_reg, val); dev_dbg(dsi->dev, "vop %s output to dsi0\n", (mux) ? "LIT" : "BIG"); + dsi->dpms_mode = DRM_MODE_DPMS_ON; } static int @@ -1198,6 +1210,7 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master, dsi->dev = dev; dsi->pdata = pdata; + dsi->dpms_mode = DRM_MODE_DPMS_OFF; ret = rockchip_mipi_parse_dt(dsi); if (ret) @@ -1271,6 +1284,8 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master, dev_set_drvdata(dev, dsi); + pm_runtime_enable(dev); + dsi->dsi_host.ops = &dw_mipi_dsi_host_ops; dsi->dsi_host.dev = dev; ret = mipi_dsi_host_register(&dsi->dsi_host); @@ -1293,6 +1308,7 @@ static void dw_mipi_dsi_unbind(struct device *dev, struct device *master, struct dw_mipi_dsi *dsi = dev_get_drvdata(dev); mipi_dsi_host_unregister(&dsi->dsi_host); + pm_runtime_disable(dev); clk_disable_unprepare(dsi->pllref_clk); } -- 2.6.3