diff for duplicates of <1485365106.2133.331.camel@linux.intel.com>
diff --git a/a/1.txt b/N1/1.txt
index 5d6f674..b34ca60 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -287,4 +287,9 @@ utilize -EPROBE_DEFER.
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Intel Finland Oy
\ No newline at end of file
+Intel Finland Oy
+
+_______________________________________________
+linux-snps-arc mailing list
+linux-snps-arc@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-snps-arc
\ No newline at end of file
diff --git a/a/content_digest b/N1/content_digest
index 716f724..dad058e 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -18,14 +18,14 @@
" dmaengine\@vger.kernel.org\0"
]
[
- "Cc\0linux-kernel\@vger.kernel.org",
+ "Cc\0Mark Rutland <mark.rutland\@arm.com>",
" devicetree\@vger.kernel.org",
- " linux-snps-arc\@lists.infradead.org",
- " Dan Williams <dan.j.williams\@intel.com>",
" Vinod Koul <vinod.koul\@intel.com>",
- " Mark Rutland <mark.rutland\@arm.com>",
+ " Alexey Brodkin <Alexey.Brodkin\@synopsys.com>",
+ " linux-kernel\@vger.kernel.org",
" Rob Herring <robh+dt\@kernel.org>",
- " Alexey Brodkin <Alexey.Brodkin\@synopsys.com>\0"
+ " Dan Williams <dan.j.williams\@intel.com>",
+ " linux-snps-arc\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -323,7 +323,12 @@
"\n",
"-- \n",
"Andy Shevchenko <andriy.shevchenko\@linux.intel.com>\n",
- "Intel Finland Oy"
+ "Intel Finland Oy\n",
+ "\n",
+ "_______________________________________________\n",
+ "linux-snps-arc mailing list\n",
+ "linux-snps-arc\@lists.infradead.org\n",
+ "http://lists.infradead.org/mailman/listinfo/linux-snps-arc"
]
-c0e7b35bf29f61e1a3cb17addd6883c00ea8ae30a1ca8e9db63b94a7a4ce8ec4
+fd7b0bdd1fd86e4ddac34883e963b45638271d063047ed6288e55027f317dda5
diff --git a/a/1.txt b/N2/1.txt
index 5d6f674..7b39bb1 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -1,4 +1,4 @@
-On Wed, 2017-01-25 at 18:34 +0300, Eugeniy Paltsev wrote:
+On Wed, 2017-01-25@18:34 +0300, Eugeniy Paltsev wrote:
> This patch adds support for the DW AXI DMAC controller.
>
> DW AXI DMAC is a part of upcoming development board from Synopsys.
@@ -15,7 +15,7 @@ Few more comments on top of not addressed/answered yet.
> +
> + val = axi_dma_ioread32(chan->chip, DMAC_CHEN);
> + val &= ~(BIT(chan->id) << DMAC_CHAN_EN_SHIFT);
-> + val |= (BIT(chan->id) << DMAC_CHAN_EN_WE_SHIFT);
+> + val |=??(BIT(chan->id) << DMAC_CHAN_EN_WE_SHIFT);
> + axi_dma_iowrite32(chan->chip, DMAC_CHEN, val);
> +}
> +
@@ -150,7 +150,7 @@ the DMA device.
> +
> +static struct dma_async_tx_descriptor *
> +dma_chan_prep_dma_memcpy(struct dma_chan *dchan, dma_addr_t dest,
-> + dma_addr_t src, size_t len, unsigned long
+> + ?dma_addr_t src, size_t len, unsigned long
> flags)
> +{
@@ -173,7 +173,7 @@ Do you indeed have a use case for this except debugging and testing?
> */
> + return dma_chan_prep_dma_sg(dchan, &dst_sg, nents,
-> + &src_sg, nents, flags);
+> + ????&src_sg, nents, flags);
One line?
@@ -181,7 +181,7 @@ One line?
> +
> +static void axi_chan_dump_lli(struct axi_dma_chan *chan,
-> + struct axi_dma_desc *desc)
+> + ??????struct axi_dma_desc *desc)
> +{
> + dev_err(dchan2dev(&chan->vc.chan),
> + "SAR: 0x%x DAR: 0x%x LLP: 0x%x BTS 0x%x CTL:
@@ -263,7 +263,7 @@ I'm not sure you will have a use case for that. Have you?
> + ret = devm_request_irq(chip->dev, chip->irq,
> dw_axi_dma_intretupt,
-> + IRQF_SHARED, DRV_NAME, chip);
+> + ???????IRQF_SHARED, DRV_NAME, chip);
> + if (ret)
> + return ret;
@@ -286,5 +286,5 @@ dependency in Device Tree, if you have something happened, you may
utilize -EPROBE_DEFER.
--
-Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Andy Shevchenko <andriy.shevchenko at linux.intel.com>
Intel Finland Oy
\ No newline at end of file
diff --git a/a/content_digest b/N2/content_digest
index 716f724..32534b8 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -5,27 +5,16 @@
"ref\0001485358457-22957-3-git-send-email-Eugeniy.Paltsev\@synopsys.com\0"
]
[
- "From\0Andy Shevchenko <andriy.shevchenko\@linux.intel.com>\0"
+ "From\0andriy.shevchenko\@linux.intel.com (Andy Shevchenko)\0"
]
[
- "Subject\0Re: [PATCH 2/2] dmaengine: Add DW AXI DMAC driver\0"
+ "Subject\0[PATCH 2/2] dmaengine: Add DW AXI DMAC driver\0"
]
[
"Date\0Wed, 25 Jan 2017 19:25:06 +0200\0"
]
[
- "To\0Eugeniy Paltsev <Eugeniy.Paltsev\@synopsys.com>",
- " dmaengine\@vger.kernel.org\0"
-]
-[
- "Cc\0linux-kernel\@vger.kernel.org",
- " devicetree\@vger.kernel.org",
- " linux-snps-arc\@lists.infradead.org",
- " Dan Williams <dan.j.williams\@intel.com>",
- " Vinod Koul <vinod.koul\@intel.com>",
- " Mark Rutland <mark.rutland\@arm.com>",
- " Rob Herring <robh+dt\@kernel.org>",
- " Alexey Brodkin <Alexey.Brodkin\@synopsys.com>\0"
+ "To\0linux-snps-arc\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -34,7 +23,7 @@
"b\0"
]
[
- "On Wed, 2017-01-25 at 18:34 +0300, Eugeniy Paltsev wrote:\n",
+ "On Wed, 2017-01-25\@18:34 +0300, Eugeniy Paltsev wrote:\n",
"> This patch adds support for the DW AXI DMAC controller.\n",
"> \n",
"> DW AXI DMAC is a part of upcoming development board from Synopsys.\n",
@@ -51,7 +40,7 @@
"> +\n",
"> +\tval = axi_dma_ioread32(chan->chip, DMAC_CHEN);\n",
"> +\tval &= ~(BIT(chan->id) << DMAC_CHAN_EN_SHIFT);\n",
- "> +\tval |=\302\240\302\240(BIT(chan->id) << DMAC_CHAN_EN_WE_SHIFT);\n",
+ "> +\tval |=??(BIT(chan->id) << DMAC_CHAN_EN_WE_SHIFT);\n",
"> +\taxi_dma_iowrite32(chan->chip, DMAC_CHEN, val);\n",
"> +}\n",
"> +\n",
@@ -186,7 +175,7 @@
"> +\n",
"> +static struct dma_async_tx_descriptor *\n",
"> +dma_chan_prep_dma_memcpy(struct dma_chan *dchan, dma_addr_t dest,\n",
- "> +\t\t\t\302\240dma_addr_t src, size_t len, unsigned long\n",
+ "> +\t\t\t?dma_addr_t src, size_t len, unsigned long\n",
"> flags)\n",
"> +{\n",
"\n",
@@ -209,7 +198,7 @@
"> */\n",
"\n",
"> +\treturn dma_chan_prep_dma_sg(dchan, &dst_sg, nents,\n",
- "> +\t\t\t\t\302\240\302\240\302\240\302\240&src_sg, nents, flags);\n",
+ "> +\t\t\t\t????&src_sg, nents, flags);\n",
"\n",
"One line?\n",
"\n",
@@ -217,7 +206,7 @@
"\n",
"> +\n",
"> +static void axi_chan_dump_lli(struct axi_dma_chan *chan,\n",
- "> +\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240struct axi_dma_desc *desc)\n",
+ "> +\t\t\t??????struct axi_dma_desc *desc)\n",
"> +{\n",
"> +\tdev_err(dchan2dev(&chan->vc.chan),\n",
"> +\t\t\"SAR: 0x%x DAR: 0x%x LLP: 0x%x BTS 0x%x CTL:\n",
@@ -299,7 +288,7 @@
"\n",
"> +\tret = devm_request_irq(chip->dev, chip->irq,\n",
"> dw_axi_dma_intretupt,\n",
- "> +\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240\302\240IRQF_SHARED, DRV_NAME, chip);\n",
+ "> +\t\t\t???????IRQF_SHARED, DRV_NAME, chip);\n",
"> +\tif (ret)\n",
"> +\t\treturn ret;\n",
"\n",
@@ -322,8 +311,8 @@
"utilize -EPROBE_DEFER.\n",
"\n",
"-- \n",
- "Andy Shevchenko <andriy.shevchenko\@linux.intel.com>\n",
+ "Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n",
"Intel Finland Oy"
]
-c0e7b35bf29f61e1a3cb17addd6883c00ea8ae30a1ca8e9db63b94a7a4ce8ec4
+6f2f056edf955a632894aac5bb7e80f6a2417623af9b6f97b820dff77837de92
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