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From: Suresh Gupta <suresh.gupta@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 4/8] armv8: Add workaround for USB erratum A-009007
Date: Fri, 3 Feb 2017 19:39:34 +0530	[thread overview]
Message-ID: <1486130978-24925-5-git-send-email-suresh.gupta@nxp.com> (raw)
In-Reply-To: <1486130978-24925-1-git-send-email-suresh.gupta@nxp.com>

Rx Compliance tests  may fail intermittently at high
jitter frequencies using default register values

Changes identified in test setup makes the Rx compliance test pass

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
---
Changes in v2:
	Clean up the code after Scott comments, 
	Previously in v1, we was defining the pointer as u32,
	then casting it to u8, and then passing it to
	a 16-bit accessor.
Changes in v3:
	Change CONFIG_XXX to CONFIG_ARCH_XXX


 arch/arm/cpu/armv8/fsl-layerscape/Kconfig          |  6 ++++
 arch/arm/cpu/armv8/fsl-layerscape/soc.c            | 42 ++++++++++++++++++++++
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  9 +++++
 .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  9 +++++
 4 files changed, 66 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index d5d6040..a27e310 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -25,6 +25,7 @@ config ARCH_LS1043A
 	select SYS_FSL_ERRATUM_A009008
 	select SYS_FSL_ERRATUM_A009798
 	select SYS_FSL_ERRATUM_A008997
+	select SYS_FSL_ERRATUM_A009007
 	select SYS_FSL_HAS_DDR3
 	select SYS_FSL_HAS_DDR4
 	select ARCH_EARLY_INIT_R
@@ -46,6 +47,7 @@ config ARCH_LS1046A
 	select SYS_FSL_ERRATUM_A009008
 	select SYS_FSL_ERRATUM_A009798
 	select SYS_FSL_ERRATUM_A008997
+	select SYS_FSL_ERRATUM_A009007
 	select SYS_FSL_HAS_DDR4
 	select SYS_FSL_SRDS_2
 	select ARCH_EARLY_INIT_R
@@ -77,6 +79,7 @@ config ARCH_LS2080A
 	select SYS_FSL_ERRATUM_A009008
 	select SYS_FSL_ERRATUM_A009798
 	select SYS_FSL_ERRATUM_A008997
+	select SYS_FSL_ERRATUM_A009007
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
 
@@ -167,6 +170,9 @@ config SYS_FSL_ERRATUM_A009798
 config SYS_FSL_ERRATUM_A008997
 	bool "Workaround for USB PHY erratum A008997"
 
+config SYS_FSL_ERRATUM_A009007
+	bool "Workaround for USB PHY erratum A009007"
+
 config MAX_CPUS
 	int "Maximum number of CPUs permitted for Layerscape"
 	default 4 if ARCH_LS1043A
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index c56cb72..9aab8a7 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -120,6 +120,46 @@ static void erratum_a008997(void)
 #endif
 #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
 }
+static void erratum_a009007(void)
+{
+/* TODO:implement the out_be16 instead of writew which is taking
+little endian style */
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+	void __iomem *usb_phy = (void __iomem *)USB_PHY1;
+	writew(USB_PHY_RX_EQ_VAL_1, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_2, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_3, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_4, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	usb_phy = (void __iomem *)USB_PHY2;
+	writew(USB_PHY_RX_EQ_VAL_1, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_2, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_3, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_4, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	usb_phy = (void __iomem *)USB_PHY3;
+	writew(USB_PHY_RX_EQ_VAL_1, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_2, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_3, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_4, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS2085A)
+	void __iomem *dcsr = (void __iomem *)DCSR_BASE;
+	writew(USB_PHY_RX_EQ_VAL_1,
+	       dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_2,
+	       dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_3,
+	       dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_4,
+	       dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_1,
+	       dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_2,
+	       dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_3,
+	       dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI);
+	writew(USB_PHY_RX_EQ_VAL_4,
+	       dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009007 */
+}
 
 #if defined(CONFIG_FSL_LSCH3)
 /*
@@ -266,6 +306,7 @@ void fsl_lsch3_early_init_f(void)
 	erratum_a009008();
 	erratum_a009798();
 	erratum_a008997();
+	erratum_a009007();
 #ifdef CONFIG_CHAIN_OF_TRUST
 	/* In case of Secure Boot, the IBR configures the SMMU
 	* to allow only Secure transactions.
@@ -536,6 +577,7 @@ void fsl_lsch2_early_init_f(void)
 	erratum_a009008();
 	erratum_a009798();
 	erratum_a008997();
+	erratum_a009007();
 }
 #endif
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 2e52078..2dacdb4 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -347,6 +347,15 @@ struct ccsr_gur {
 #define USB_TXVREFTUNE			0x9
 #define USB_SQRXTUNE			0xFC7FFFFF
 #define USB_PCSTXSWINGFULL		0x47
+#define USB_PHY1			0x084F0000
+#define USB_PHY2			0x08500000
+#define USB_PHY3			0x08510000
+#define USB_PHY_RX_OVRD_IN_HI		0x200c
+/* TODO : make it generic */
+#define USB_PHY_RX_EQ_VAL_1		0x0000
+#define USB_PHY_RX_EQ_VAL_2		0x8000
+#define USB_PHY_RX_EQ_VAL_3		0x8003
+#define USB_PHY_RX_EQ_VAL_4		0x800b
 
 #define SCFG_SNPCNFGCR_SECRDSNP		0x80000000
 #define SCFG_SNPCNFGCR_SECWRSNP		0x40000000
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 3106ed3..819172e 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -133,6 +133,15 @@
 #define USB_TXVREFTUNE			0x9
 #define USB_SQRXTUNE			0xFC7FFFFF
 #define USB_PCSTXSWINGFULL		0x47
+#define DCSR_BASE		0x700000000ULL
+#define DCSR_USB_PHY1			0x4600000
+#define DCSR_USB_PHY2			0x4610000
+#define DCSR_USB_PHY_RX_OVRD_IN_HI	0x1006
+#define USB_PHY_RX_EQ_VAL_1		0x0000
+#define USB_PHY_RX_EQ_VAL_2		0x0080
+#define USB_PHY_RX_EQ_VAL_3		0x0380
+#define USB_PHY_RX_EQ_VAL_4		0x0b80
+
 #define SCFG_QSPICLKCTLR	0x10
 
 #define TP_ITYP_AV		0x00000001	/* Initiator available */
-- 
1.9.3

  parent reply	other threads:[~2017-02-03 14:09 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-03 14:09 [U-Boot] [PATCH v3 0/8] Add workaround for USB PHY errata Suresh Gupta
2017-02-03 14:09 ` [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum A-009008 Suresh Gupta
2017-02-03 14:09 ` [U-Boot] [PATCH v3 2/8] armv8: Add workaround for USB erratum A-009798 Suresh Gupta
2017-02-03 14:09 ` [U-Boot] [PATCH v3 3/8] armv8: Add workaround for USB erratum A-008997 Suresh Gupta
2017-02-03 14:09 ` Suresh Gupta [this message]
2017-02-16 21:12   ` [U-Boot] [PATCH v3 4/8] armv8: Add workaround for USB erratum A-009007 york sun
     [not found]   ` <e8695096-7813-4908-f3c5-221f4d70de0f@nxp.com>
2017-02-23 17:48     ` york sun
2017-02-24  7:19       ` Suresh Gupta
2017-02-24 17:00         ` york sun
2017-02-28 10:52           ` Suresh Gupta
2017-02-28 16:25             ` york sun
2017-03-01  4:06               ` Suresh Gupta
2017-03-22 16:42                 ` york sun
2017-04-18 15:57                 ` York Sun
2017-02-03 14:09 ` [U-Boot] [PATCH v3 5/8] armv7: Add workaround for USB erratum A-009008 Suresh Gupta
2017-02-03 14:09 ` [U-Boot] [PATCH v3 6/8] armv7: Add workaround for USB erratum A-009798 Suresh Gupta
2017-02-03 14:09 ` [U-Boot] [PATCH v3 7/8] armv7: Add workaround for USB erratum A-008997 Suresh Gupta
2017-02-03 14:09 ` [U-Boot] [PATCH v3 8/8] armv7: Add workaround for USB erratum A-009007 Suresh Gupta
2017-08-17  7:31 [U-Boot] [PATCH v3 1/8] armv8: Add workaround for USB erratum A-009008 Ran Wang
2017-08-17  7:31 ` [U-Boot] [PATCH v3 4/8] armv8: Add workaround for USB erratum A-009007 Ran Wang

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