[PATCH v8 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c

[Yi Sun <yi.y.sun@linux.intel.com>]

Hi all,

We plan to bring a new PSR (Platform Shared Resource) feature called
Intel L2 Cache Allocation Technology (L2 CAT) to Xen.

Besides the L2 CAT implementaion, we refactor the psr.c to make it more
flexible to add new features and fulfill the principle, open for extension
but closed for modification. We abstract the general operations of all
features and encapsulate them into a structure. Then, the development
of new feature is simple to mainly implement these callback functions.

The patch set can be found at:
https://github.com/yisun-git/xen.git l2_cat_v8

v7:
- patch 1:
    - change revision info.
    - add content int 'Areas for improvement'.
- patch 4:
    - remove unused parameter of psr_cpu_prepare.
    - add comments in cpu_fini_work.
    - coding style fix.
- patch 12:
    - modify 'write_msr' callback function to 'void' because we have to set
      all features' cbm. When input cos exceeds some features' cos_max, just
      skip them but not break the iteration.
- patch 16:
    - modify 'l3_cdp_write_msr' to 'void'.
- patch 20:
    - modify 'l2_cat_write_msr' to 'void'.

Yi Sun (24):
  docs: create Cache Allocation Technology (CAT) and Code and Data
    Prioritization (CDP) feature document
  x86: refactor psr: remove L3 CAT/CDP codes.
  x86: refactor psr: implement main data structures.
  x86: refactor psr: implement CPU init and free flow.
  x86: refactor psr: implement Domain init/free and schedule flows.
  x86: refactor psr: implement get hw info flow.
  x86: refactor psr: implement get value flow.
  x86: refactor psr: set value: implement framework.
  x86: refactor psr: set value: assemble features value array.
  x86: refactor psr: set value: implement cos finding flow.
  x86: refactor psr: set value: implement cos id picking flow.
  x86: refactor psr: set value: implement write msr flow.
  x86: refactor psr: implement CPU init and free flow for CDP.
  x86: refactor psr: implement get hw info flow for CDP.
  x86: refactor psr: implement get value flow for CDP.
  x86: refactor psr: implement set value callback functions for CDP.
  x86: L2 CAT: implement CPU init and free flow.
  x86: L2 CAT: implement get hw info flow.
  x86: L2 CAT: implement get value flow.
  x86: L2 CAT: implement set value flow.
  tools: L2 CAT: support get HW info for L2 CAT.
  tools: L2 CAT: support show cbm for L2 CAT.
  tools: L2 CAT: support set cbm for L2 CAT.
  docs: add L2 CAT description in docs.

 docs/features/intel_psr_cat_cdp.pandoc |  469 +++++++++
 docs/man/xl.pod.1.in                   |   25 +-
 docs/misc/xl-psr.markdown              |   10 +-
 tools/libxc/include/xenctrl.h          |    7 +-
 tools/libxc/xc_psr.c                   |   45 +-
 tools/libxl/libxl.h                    |    9 +
 tools/libxl/libxl_psr.c                |   19 +-
 tools/libxl/libxl_types.idl            |    1 +
 tools/libxl/xl_cmdimpl.c               |  169 +++-
 tools/libxl/xl_cmdtable.c              |    6 +-
 xen/arch/x86/cpuid.c                   |    6 -
 xen/arch/x86/domctl.c                  |   49 +-
 xen/arch/x86/psr.c                     | 1620 ++++++++++++++++++++++++++------
 xen/arch/x86/sysctl.c                  |   45 +-
 xen/include/asm-x86/msr-index.h        |    1 +
 xen/include/asm-x86/processor.h        |    7 +
 xen/include/asm-x86/psr.h              |   29 +-
 xen/include/public/domctl.h            |    2 +
 xen/include/public/sysctl.h            |    6 +
 19 files changed, 2112 insertions(+), 413 deletions(-)
 create mode 100644 docs/features/intel_psr_cat_cdp.pandoc

-- 
1.9.1


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