From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ley Foon Tan Date: Wed, 22 Feb 2017 17:47:18 +0800 Subject: [U-Boot] [PATCH 00/20] Add Intel Arria 10 SoC support Message-ID: <1487756858-16730-1-git-send-email-ley.foon.tan@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This patchset adds support to Intel Arria 10 SoC. This is initial patchset enables the basic support for Arria 10 and other features will come after this. Tien Fong submitted the initial version previously as in [1] and Marek suggested to restructure the whole patch series. So, this series resolve comments from [1] and restructure all the patches. Since the patch series is changed, so I start this with new version number v1. This series is working on top of ?arm: socfpga: Move to using distro boot? series [2] from Dalon Westergreen. [1]: https://www.mail-archive.com/u-boot at lists.denx.de/msg235503.html [2]: https://www.mail-archive.com/u-boot at lists.denx.de/msg239560.html Regards Ley Foon Ley Foon Tan (20): arm: socfpga: restructure clock manager driver arm: socfpga: restructure reset manager driver arm: socfpga: restructure misc driver arm: socfpga: restructure system manager arm: socfpga: add A10 defines arm: socfpga: add reset driver support for Arria 10 arm: socfpga: add clock driver for Arria 10 arm: socfpga: add system manager for Arria 10 arm: socfpga: add sdram header file for Arria 10 arm: socfpga: add misc support for Arria 10 arm: socfpga: add pinmux for Arria 10 fdt: add compatible strings for Arria 10 arm: dts: add dts and dtsi for Arria 10 arm: socfpga: add SPL support for Arria 10 drivers: Makefile: include fpga build in SPL drivers: fpga: add compile switch for Gen5 only registers arm: socfpga: convert Altera ddr driver to use Kconfig arm: socfpga: add config and defconfig for Arria 10 arm: socfpga: add board files for the Arria10 arm: socfpga: enable build for Arria 10 arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_arria10.dtsi | 859 +++++++++++++++ arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 30 + .../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi | 479 +++++++++ arch/arm/mach-socfpga/Kconfig | 9 + arch/arm/mach-socfpga/Makefile | 41 +- arch/arm/mach-socfpga/clock_manager.c | 532 +--------- arch/arm/mach-socfpga/clock_manager_arria10.c | 1104 ++++++++++++++++++++ arch/arm/mach-socfpga/clock_manager_gen5.c | 521 +++++++++ arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +- arch/arm/mach-socfpga/include/mach/clock_manager.h | 313 +----- .../include/mach/clock_manager_arria10.h | 231 ++++ .../mach-socfpga/include/mach/clock_manager_gen5.h | 322 ++++++ arch/arm/mach-socfpga/include/mach/misc.h | 32 + arch/arm/mach-socfpga/include/mach/pinmux.h | 15 + arch/arm/mach-socfpga/include/mach/reset_manager.h | 44 +- .../include/mach/reset_manager_arria10.h | 144 +++ .../mach-socfpga/include/mach/reset_manager_gen5.h | 47 + arch/arm/mach-socfpga/include/mach/sdram_arria10.h | 380 +++++++ .../arm/mach-socfpga/include/mach/system_manager.h | 177 ++-- .../include/mach/system_manager_arria10.h | 81 ++ .../include/mach/system_manager_gen5.h | 122 +++ arch/arm/mach-socfpga/misc.c | 361 +------ arch/arm/mach-socfpga/misc_arria10.c | 262 +++++ arch/arm/mach-socfpga/misc_gen5.c | 356 +++++++ arch/arm/mach-socfpga/pinmux_arria10.c | 98 ++ arch/arm/mach-socfpga/reset_manager.c | 93 +- arch/arm/mach-socfpga/reset_manager_arria10.c | 406 +++++++ arch/arm/mach-socfpga/reset_manager_gen5.c | 113 ++ arch/arm/mach-socfpga/spl.c | 92 +- arch/arm/mach-socfpga/system_manager.c | 85 -- arch/arm/mach-socfpga/system_manager_gen5.c | 85 ++ board/altera/arria10-socdk/Kconfig | 18 + board/altera/arria10-socdk/Makefile | 7 + board/altera/arria10-socdk/socfpga.c | 7 + configs/socfpga_arria10_defconfig | 30 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/ddr/Kconfig | 1 + drivers/ddr/altera/Kconfig | 6 + drivers/fpga/socfpga.c | 6 + include/configs/socfpga_arria10_socdk.h | 67 ++ include/configs/socfpga_common.h | 30 +- include/dt-bindings/reset/altr,rst-mgr-a10.h | 103 ++ include/fdtdec.h | 8 + lib/fdtdec.c | 8 + 46 files changed, 6244 insertions(+), 1493 deletions(-) create mode 100644 arch/arm/dts/socfpga_arria10.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi create mode 100644 arch/arm/mach-socfpga/clock_manager_arria10.c create mode 100644 arch/arm/mach-socfpga/clock_manager_gen5.c create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h create mode 100644 arch/arm/mach-socfpga/include/mach/misc.h create mode 100644 arch/arm/mach-socfpga/include/mach/pinmux.h create mode 100755 arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h create mode 100755 arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_arria10.h create mode 100755 arch/arm/mach-socfpga/include/mach/system_manager_arria10.h create mode 100755 arch/arm/mach-socfpga/include/mach/system_manager_gen5.h create mode 100644 arch/arm/mach-socfpga/misc_arria10.c create mode 100755 arch/arm/mach-socfpga/misc_gen5.c create mode 100644 arch/arm/mach-socfpga/pinmux_arria10.c create mode 100644 arch/arm/mach-socfpga/reset_manager_arria10.c create mode 100755 arch/arm/mach-socfpga/reset_manager_gen5.c delete mode 100644 arch/arm/mach-socfpga/system_manager.c create mode 100644 arch/arm/mach-socfpga/system_manager_gen5.c create mode 100644 board/altera/arria10-socdk/Kconfig create mode 100644 board/altera/arria10-socdk/Makefile create mode 100644 board/altera/arria10-socdk/socfpga.c create mode 100644 configs/socfpga_arria10_defconfig create mode 100644 drivers/ddr/Kconfig create mode 100644 drivers/ddr/altera/Kconfig create mode 100644 include/configs/socfpga_arria10_socdk.h create mode 100644 include/dt-bindings/reset/altr,rst-mgr-a10.h -- 1.8.2.3