From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751434AbdBWIoN (ORCPT ); Thu, 23 Feb 2017 03:44:13 -0500 Received: from smtpout.microchip.com ([198.175.253.82]:30566 "EHLO email.microchip.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751201AbdBWIoL (ORCPT ); Thu, 23 Feb 2017 03:44:11 -0500 From: Claudiu Beznea To: , , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH 1/2] drivers: pwm: pwm-atmel: add support for pwm on sama5d2 Date: Thu, 23 Feb 2017 10:38:39 +0200 Message-ID: <1487839120-13650-2-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487839120-13650-1-git-send-email-claudiu.beznea@microchip.com> References: <1487839120-13650-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable PWM on sama5d2 by adding atmel_pwm_config_v3(). This, simply, sets the period and duty factor registers. Signed-off-by: Claudiu Beznea --- Documentation/devicetree/bindings/pwm/atmel-pwm.txt | 1 + drivers/pwm/pwm-atmel.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/atmel-pwm.txt b/Documentation/devicetree/bindings/pwm/atmel-pwm.txt index 02331b9..c8c831d 100644 --- a/Documentation/devicetree/bindings/pwm/atmel-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/atmel-pwm.txt @@ -4,6 +4,7 @@ Required properties: - compatible: should be one of: - "atmel,at91sam9rl-pwm" - "atmel,sama5d3-pwm" + - "atmel,sama5d2-pwm" - reg: physical base address and length of the controller's registers - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format. diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index 0e4bd4e..4406639 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -207,6 +207,15 @@ static void atmel_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm, } } +static void atmel_pwm_config_v3(struct pwm_chip *chip, struct pwm_device *pwm, + unsigned long dty, unsigned long prd) +{ + struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip); + + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CDTY, dty); + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CPRD, prd); +} + static int atmel_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm, enum pwm_polarity polarity) { @@ -295,6 +304,10 @@ static const struct atmel_pwm_data atmel_pwm_data_v2 = { .config = atmel_pwm_config_v2, }; +static const struct atmel_pwm_data atmel_pwm_data_v3 = { + .config = atmel_pwm_config_v3, +}; + static const struct platform_device_id atmel_pwm_devtypes[] = { { .name = "at91sam9rl-pwm", @@ -316,6 +329,9 @@ static const struct of_device_id atmel_pwm_dt_ids[] = { .compatible = "atmel,sama5d3-pwm", .data = &atmel_pwm_data_v2, }, { + .compatible = "atmel,sama5d2-pwm", + .data = &atmel_pwm_data_v3, + }, { /* sentinel */ }, }; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claudiu Beznea Subject: [PATCH 1/2] drivers: pwm: pwm-atmel: add support for pwm on sama5d2 Date: Thu, 23 Feb 2017 10:38:39 +0200 Message-ID: <1487839120-13650-2-git-send-email-claudiu.beznea@microchip.com> References: <1487839120-13650-1-git-send-email-claudiu.beznea@microchip.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1487839120-13650-1-git-send-email-claudiu.beznea@microchip.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: thierry.reding@gmail.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, boris.brezillon@free-electrons.com, alexandre.belloni@free-electrons.com Cc: linux-pwm@vger.kernel.org, Claudiu Beznea , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org List-Id: devicetree@vger.kernel.org Enable PWM on sama5d2 by adding atmel_pwm_config_v3(). This, simply, sets the period and duty factor registers. Signed-off-by: Claudiu Beznea --- Documentation/devicetree/bindings/pwm/atmel-pwm.txt | 1 + drivers/pwm/pwm-atmel.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/atmel-pwm.txt b/Documentation/devicetree/bindings/pwm/atmel-pwm.txt index 02331b9..c8c831d 100644 --- a/Documentation/devicetree/bindings/pwm/atmel-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/atmel-pwm.txt @@ -4,6 +4,7 @@ Required properties: - compatible: should be one of: - "atmel,at91sam9rl-pwm" - "atmel,sama5d3-pwm" + - "atmel,sama5d2-pwm" - reg: physical base address and length of the controller's registers - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format. diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index 0e4bd4e..4406639 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -207,6 +207,15 @@ static void atmel_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm, } } +static void atmel_pwm_config_v3(struct pwm_chip *chip, struct pwm_device *pwm, + unsigned long dty, unsigned long prd) +{ + struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip); + + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CDTY, dty); + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CPRD, prd); +} + static int atmel_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm, enum pwm_polarity polarity) { @@ -295,6 +304,10 @@ static const struct atmel_pwm_data atmel_pwm_data_v2 = { .config = atmel_pwm_config_v2, }; +static const struct atmel_pwm_data atmel_pwm_data_v3 = { + .config = atmel_pwm_config_v3, +}; + static const struct platform_device_id atmel_pwm_devtypes[] = { { .name = "at91sam9rl-pwm", @@ -316,6 +329,9 @@ static const struct of_device_id atmel_pwm_dt_ids[] = { .compatible = "atmel,sama5d3-pwm", .data = &atmel_pwm_data_v2, }, { + .compatible = "atmel,sama5d2-pwm", + .data = &atmel_pwm_data_v3, + }, { /* sentinel */ }, }; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: claudiu.beznea@microchip.com (Claudiu Beznea) Date: Thu, 23 Feb 2017 10:38:39 +0200 Subject: [PATCH 1/2] drivers: pwm: pwm-atmel: add support for pwm on sama5d2 In-Reply-To: <1487839120-13650-1-git-send-email-claudiu.beznea@microchip.com> References: <1487839120-13650-1-git-send-email-claudiu.beznea@microchip.com> Message-ID: <1487839120-13650-2-git-send-email-claudiu.beznea@microchip.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Enable PWM on sama5d2 by adding atmel_pwm_config_v3(). This, simply, sets the period and duty factor registers. Signed-off-by: Claudiu Beznea --- Documentation/devicetree/bindings/pwm/atmel-pwm.txt | 1 + drivers/pwm/pwm-atmel.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/atmel-pwm.txt b/Documentation/devicetree/bindings/pwm/atmel-pwm.txt index 02331b9..c8c831d 100644 --- a/Documentation/devicetree/bindings/pwm/atmel-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/atmel-pwm.txt @@ -4,6 +4,7 @@ Required properties: - compatible: should be one of: - "atmel,at91sam9rl-pwm" - "atmel,sama5d3-pwm" + - "atmel,sama5d2-pwm" - reg: physical base address and length of the controller's registers - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format. diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c index 0e4bd4e..4406639 100644 --- a/drivers/pwm/pwm-atmel.c +++ b/drivers/pwm/pwm-atmel.c @@ -207,6 +207,15 @@ static void atmel_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm, } } +static void atmel_pwm_config_v3(struct pwm_chip *chip, struct pwm_device *pwm, + unsigned long dty, unsigned long prd) +{ + struct atmel_pwm_chip *atmel_pwm = to_atmel_pwm_chip(chip); + + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CDTY, dty); + atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CPRD, prd); +} + static int atmel_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm, enum pwm_polarity polarity) { @@ -295,6 +304,10 @@ static const struct atmel_pwm_data atmel_pwm_data_v2 = { .config = atmel_pwm_config_v2, }; +static const struct atmel_pwm_data atmel_pwm_data_v3 = { + .config = atmel_pwm_config_v3, +}; + static const struct platform_device_id atmel_pwm_devtypes[] = { { .name = "at91sam9rl-pwm", @@ -316,6 +329,9 @@ static const struct of_device_id atmel_pwm_dt_ids[] = { .compatible = "atmel,sama5d3-pwm", .data = &atmel_pwm_data_v2, }, { + .compatible = "atmel,sama5d2-pwm", + .data = &atmel_pwm_data_v3, + }, { /* sentinel */ }, }; -- 2.7.4